Kabushiki Kaisha Toshiba

Other

Brillnics Japan Inc.

Shinji Ohsawa

Yoshitaka Egawa

Yoshiyuki Matsunaga

Nobuo Nakamura

Yukio Endo

Hirofumi Yamashita

Hiroki Miura

Nagataka Tanaka

Yoriko Tanaka

Ryohei Miyagawa

Hiromi Kusakabe

Keiji Mabuchi

Michio Sasaki

Tadashi Sugiki

Ikuko Inoue

Shunsuke Okura

Hiroshige Goto

Fumio Izawa

Ryuta Okamoto

Makoto Hoshino

Nahoko Endo

Tsuyoshi Arakawa

Yoshiyuki Tomizawa

Norio Yoshimura

A solid-state imaging device capable of reducing an area of a chip, capable of realizing both reduction of voltage and prevention of inversion video noise and consequently capable of realizing a higher image quality having a pixel portion and a clipping circuit capable of clipping a pixel readout voltage in accordance with a clipping voltage, wherein the pixel includes a photo-electric conversion element PD, a transfer element capable of transferring a charge accumulated in the photo-electric conversion element in a transfer period, a floating diffusion FD to which the charge accumulated in the photo-electric conversion element is transferred through a transfer element, a source-follower element which converts the charge in the floating diffusion to a voltage signal in accordance with a charge quantity, and a reset element which resets the floating diffusion to a predetermined potential in a resetting period, and the clipping circuit is arranged in an ineffective region of the pixel portion, a driving method for the same, and an electronic apparatus.

Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus

Pixels are two-dimensionally arranged into rows and columns in an image sensing region of a solid-state image sensing device, and divided into a plurality of vertical blocks. A vertical signal line is connected to each pixel column. A voltage read out from a pixel is A/D-converted and held in a holding circuit. A vertical block selection circuit outputs a vertical block selection signal in response to a horizontal sync pulse. An intra-block line selection circuit selects one pixel row in one block or simultaneously selects a plurality of pixel rows in one block, in accordance with the selection signal and a signal for setting the number of lines to be selected. A pulse selector circuit supplies a pixel driving pulse signal to a pixel row selected by the intra-block line selection circuit.

Amplification-type CMOS image sensor

A solid-state image sensing device includes a pixel unit, analog-to-digital converter, controller, and adder. In the pixel unit, cells are two-dimensionally arranged on a semiconductor substrate. An output analog signal from the pixel unit is converted into a digital signal by the analog-to-digital converter and output. The controller controls the pixel unit and analog-to-digital converter, and causes the analog-to-digital converter to digitize a plurality of analog signals different in storage time in the pixel unit during the storage period of the electric charge of one frame. The adder adds digital signals corresponding to the analog signals different in storage time and output from the analog-to-digital converter.

CMOS image sensor having wide dynamic range

An image pickup apparatus comprising an array of unit cells, vertical signal lines, and a control circuit. The unit cells are arranged in rows and columns. Each unit cell has a light-receiving device for receiving light and generating an electric charge corresponding to the light, a charge-accumulating section for accumulating the electric charge generated by the light-receiving device, a transfer device for transferring the electric charge from the light-receiving device to the charge-accumulating section, and a charge-limiting device for limiting the electric charge accumulated in the charge-accumulating section. The vertical signal lines extend along the columns of unit cells, respectively, each for receiving a electric data item corresponding to the electric charge accumulated in the charge-accumulating section of any unit cell of the associated column. The control circuit controls each of the unit cells, causing the charge-limiting device to limit the charge generated by the light-receiving device during a first period and transferred to the charge-accumulating section through the transfer device. The charge generated by the light-receiving device during a second period following the first period and transferred to the charge-accumulating section through the transfer device is added to the electric charge accumulated in the charge-accumulating section.

Amplification type image pickup apparatus and method of controlling the amplification type image pickup apparatus

A solid-state image sensor which includes a pixel section, AD converter, line memory, controller and synthesizer is disclosed. The line memory stores a digital signal output from the AD converter. The controller controls the pixel section and AD converter to subject analog signals of different exposure times to an AD converting process by use of the AD converter and transfer the thus AD-converted signals to the line memory in an accumulation period of charges of one frame. The synthesizer is supplied with digital signals of different exposure times from the line memory, compare a fist signal obtained by adding signals of short and long exposure times with a second signal obtained by amplifying the signal of short exposure time by the ratio of the signal of short exposure time to the signal of long exposure time, select a larger one of the compared signals and output the selected signal.

Amplification-type CMOS image sensor of wide dynamic range

An MOS-type solid-state imaging apparatus includes an imaging region formed by two-dimensionally arranging unit cells serving as photoelectric conversion portions on a semiconductor substrate, a plurality of vertical address lines arranged in a row direction of the imaging region to select a row of unit cells to be addressed, a plurality of vertical signal lines arranged in a column direction of the imaging region to read out signals from the unit cells in each column, a plurality of load transistors each connected to one end of each of the vertical signal lines, and a plurality of horizontal selection transistors each connected to the other end of each of the vertical signal lines. In this apparatus, each unit cell includes a photodiode serving as a photoelectric conversion portion, an amplification transistor having a gate to which an output from the photodiode is supplied, and a source and a drain respectively connected to the vertical signal line and the vertical address line, an address capacitor connected between the gate of the amplification transistor and the vertical address line, and a reset transistor connected in parallel with the address capacitor.

MOS-type solid-state imaging apparatus

In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair. The horizontal select transistors in each pair share one of the source/drain regions so as to be connected to the horizontal signal line in common, and the others of the source/drain regions are connected to the vertical signal line individually.

High-speed solid-state imaging device capable of suppressing image noise

An image system uses an amplification-type MOS sensor for receiving an optical image through a photoelectric conversion element, converting the image into an electrical signal, and outputting the signal. This system includes an optical system for guiding this optical image to a predetermined position, an image processing means having a sensor for photoelectrically converting the optical image guided to the predetermined position by the optical system into an electrical signal in units of pixels, and a signal process device for processing an output from the image processing means, and outputting the resultant data. The sensor includes a photoelectric conversion element placed at the predetermined position, an output circuit having an amplification MOS transistor connected to the photoelectric conversion element and serving to amplify and output an output from the photoelectric conversion element at a first timing and output noise independent of the output from the photoelectric conversion element at a second timing, and a noise reduction circuit, connected to the output of the output circuit, having the same impedance at the first and second timings when viewed from the output circuit, and obtaining the difference between outputs from the output circuits at the first and second timings. By setting the same impedance, proper noise cancellation can be performed.

Image system, solid-state imaging semiconductor integrated circuit device used in the image system, and difference output method used for the image system

Disclosed is a solid-state imaging device comprising pickup circuit formed by the arrangement of a unit cell in two dimensions, a plurality of reading lines provided in a horizontal direction corresponding to each pixel row in the pickup region to transmit the reading drive signal &#x3c6;READi for driving each reading circuit of the unit cell of respectively corresponding pixel row, a vertical drive selection circuit configured to drive the reading circuit by selectively supplying the reading drive signal to these reading lines, and first row selection circuit and a second row selection circuit configured to control the vertical drive circuit so as to drive reading circuit of each pixel row on the basis of the first pulse and the second pulse &#x3c6;ROREAD and &#x3c6;ESREAD respectively. The solid-state imaging device is capable of controlling a minimum electric charge accumulation time in the photodiode to less than 1H (a horizontal cycle) and is capable of conducting an extremely high-speed shutter operation.

CMOS imaging device for amplifying and fetching signal charge

A solid-state imaging device includes unit cells, arranged in a matrix of rows and columns, each having a photodiode for photoelectrically converting incident light to store signal charges, a readout transistor Td for reading out the signal charges and amplifying transistor Tb for amplifying signals readout at a detection node, a plurality of vertical shift registers for generating signal charge readout pulses ESi, DRi, ROi and a voltage switching circuit for setting a voltage VDR of the readout pulse DRi for dynamic range control lower than voltages of both a readout pulse ESi for an electronic shutter and a usual readout pulse ROi. The solid-state imaging device provides excellent images without clipping from a small signal region to large signal region.

Solid-state imaging device with dynamic range control

In a solid state image sensor device comprising a cell area wherein unit cells each having photoelectric diodes are arranged in a matrix form on a semiconductor substrate, the cell area being composed of a photo-sensitive pixel region for sensing an image, and an optical black pixel region for defining an optical black level, and a vertical shift register for selecting the unit cells of the image sensing cell array, in a group along each of horizontal lines, and vertical signal lines, each of which reads each of signals from the unit cells selected by turning on an address register by means of the vertical shift register, the vertical signal lines in the optical black pixel region are connected with each other through a wiring. Since the vertical signal lines in the optical black pixel region are connected with each other by a wiring, even if outputs from an optical black pixel region vary in the pixels, the outputs are made averaged and uniform and a variation in fixed pattern noises between the horizontal lines are reduced.

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Ebina, Japan

Shinji Ohsawa