Matsushita Electric Industrial Co., Ltd.

Shinji Murakami

Yutaka Harada

Yoshifumi Nakamura

Nozomi Shimoishizaka

Takahiro Kumakawa

Ryuichi Sahara

Kenichi Sato

Norihito Tsukahara

Mitsunori Yokomakura

Mitsumasa Oku

Takashi Akiguchi

Takuya Oka

Keiichi Iiyama

Takashi Noda

Masaru Tanichi

A low elasticity layer ( ) having an opening in an electrode arranging area where element electrodes are disposed is provided on a main surface of a semiconductor substrate ( ). On the low elasticity layer ( ), lands ( ) serving as external electrodes are disposed, and pads ( ) on the element electrodes, the lands ( ) and metal wires ( ) for connecting them are integrally formed as a metal wiring pattern ( ). A solder resist film ( ) having an opening for exposing a part of each land ( ) is formed, and a metal ball ( ) is provided on the land ( ) in the opening. The low elasticity layer ( ) absorbs thermal stress and the like caused in heating or cooling the semiconductor device, so as to prevent disconnection of the metal wires ( ).

Semiconductor device and method for manufacturing the same

An electronic circuit module formed of an antenna coil and an integrated circuit provided on a circuit board is provided inside a hollow resin case formed of a first part and a second part. A first slit leading into the hollow portion is provided in one side face of the resin case formed of the first and second parts joined to each other. Since the electronic circuit module is not exposed to high temperatures and high pressure during the manufacturing process, defects such as the breakage of the integrated circuit or the disconnection of the antenna coil can be avoided. Since the slit leading into the hollow portion is provided, the hollow portion does not swell by the temperature increase. In addition, pinholes do not tend to be formed during the joining of the first and second parts. Thus, a contactless data carrier with an excellent electrostatic withstand voltage characteristic can be provided.

Contactless data carrier

A method for mounting parts, and an IC card and its manufacturing method. The method reduces the number of steps, increases productivity, lowers costs, and miniaturizes the chip. A first electrode of the IC chip for processing signals received from a coil is connected to an internal end of a coil pattern formed on a first substrate, and an external end of the coil pattern and a second electrode of the IC chip are connected via a jumper wire.

Method for mounting parts and making an IC card

A low elasticity layer (,) having an opening in an electrode arranging area where element electrodes are disposed is provided on a main surface of a semiconductor substrate (,). On the low elasticity layer (,), lands (,) serving as external electrodes are disposed, and pads (,) on the element electrodes, the lands (,) and metal wires (,) for connecting them are integrally formed as a metal wiring pattern (,). A solder resist film (,) having an opening for exposing a part of each land (,) is formed, and a metal ball (,) is provided on the land (,) in the opening. The low elasticity layer (,) absorbs thermal stress and the like caused in heating or cooling the semiconductor device, so as to prevent disconnection of the metal wires (,).

Growing community of inventors

Yawata, Japan

Shinji Murakami