Kabushiki Kaisha Toshiba

Shinji Mita

Tadahiro Kuroda

Kojiro Suzuki

A driving voltage supplied to a semiconductor integrated circuit can be controlled. The semiconductor integrated circuit device provided with a voltage converter circuit comprises: a buffer circuit having: a P-channel MOS transistor having a source connected to a first supply voltage; and an N-channel MOS transistor having a source connected to a second supply voltage and a drain connected to a drain of the P-channel MOS transistor, an output voltage being outputted from a common-connected drain terminals of the two MOS transistors; a duty ratio control circuit having: a counter for outputting a first n-bit signal by repeatedly counting up numbers from 0 to (2.sup.n -1) one by one in synchronism with a first clock signal; and a comparator circuit for comparing the first n-bit signal with a second n-bit signal applied from the outside, and for outputting a first control signal to a gate of the P-channel MOS transistor and a second control signal to the N-channel MOS transistor; and a smoothing circuit for smoothing the output of the buffer circuit, a voltage smoothed by the smoothing circuit being outputted as an output of the voltage converter circuit.

Semiconductor integrated circuit device

A level conversion circuit is provided which can obtain a stable output voltage, with keeping low power consumption and a high speed operation, if manufacturing processes and operational conditions of the LSI'S are varied. The level conversion circuit comprising a first input portion for receiving a first CMOS level signal as a differential signal at the CMOS level and a second CMOS level signal as an inverted signal of the first CMOS level signal, and outputting a first output current and a second output current based on these signals, a first conversion output portion for outputting a first PECL level signal as the PECL level differential signal and a second PECL level signal as an inverted signal of the first PECL level signal based on the first output current and the second output current from the first input portion, and a first current control portion for controlling the first output current and the second output current in the first conversion output portion by a first current control signal and a second current control signal so as to determine high level and low level in the first PECL level signal and the second PECL level signal.

Growing community of inventors

Kawasaki, Japan

Shinji Mita