Denso Corporation

Shinji Amano

Eiichi Okuno

Kenji Kouno

Takeshi Endo

Norihito Tokura

Tsuyoshi Yamamoto

Yukio Tsuzuki

Hiromitsu Tanabe

Shinichi Mukainakano

Yoshiyuki Hisada

Yoshihito Mitsuoka

Hisato Kato

Hiroki Sone

Ayahiko Ichimiya

In a semiconductor device having a vertical semiconductor element configured to pass an electric current between an upper electrode and a lower electrode, a field stop layer includes a phosphorus/arsenic layer doped with phosphorus or arsenic and a proton layer doped with proton. The phosphorus/arsenic layer is formed from a back side of a semiconductor substrate to a predetermined depth. The proton layer is deeper than the phosphorus/arsenic layer. An impurity concentration of the proton layer peaks inside the phosphorus/arsenic layer and gradually, continuously decreases at a depth greater than the phosphorus/arsenic layer.

Semiconductor device

A semiconductor device includes a semiconductor substrate having a first surface and a second surface. A main region and a sensing region are formed on the first surface side of the semiconductor substrate. A RC-IGBT is formed in the main region and a sensing element for passing electric currents proportional to electric currents flowing through the RC-IGBT is formed in the sensing region. A collector region and a cathode region of the sensing element are formed on the second surface side of the semiconductor substrate. The collector region is located directly below the sensing region in a thickness direction of the semiconductor substrate. The cathode region is not located directly below the sensing region in the thickness direction.

A semiconductor device includes a spaced-channel IGBT and an antiparallel diode that are formed in a same semiconductor substrate. The IGBT includes a base layer and insulated gate trenches by which the base layer is divided into a body region connected to an emitter and a floating region disconnected from the emitter. The IGBT is formed in a cell region of an IGBT region, and the diode is formed in a diode region. A boundary region of the IGBT region is located between the cell region and the diode region. A spacing between adjacent gate trenches in the boundary region is less than a spacing between adjacent gate trenches between which the floating region is located in the cell region.

The principal surface of a p-type SiC substrate () is formed of a face intersecting (0001) Si-face at 10 to 16&#xb0;. An nsource region () and an ndrain region () are formed in a surface layer portion at the principal surface of the p-type SiC substrate () so as to be separated from each other. A gate electrode () is formed on a gate oxide film () on the principal surface of the p-type SiC substrate ().

Silicon carbide semiconductor device having enhanced carrier mobility

In a method for manufacturing a silicon carbide semiconductor device including a gate oxide film formed on a surface channel layer, the gate oxide film is formed by a thermal oxidation treatment that is performed at conditions under which a recrystallization reaction between silicon dioxide (SiO ) and carbon (C) occurs to produce silicon carbide (SiC) with a Gibbs free energy G being negative. The recrystallization reaction is expressed by a chemical formula of SiO &plus;3C&rarr;SiC&plus;2CO&plus;G . Accordingly, residual carbon can be reduced at an interface between the gate oxide film and the surface channel layer.

Method of manufacturing silicon carbide semiconductor device having oxide film formed thereon with low on-resistances

In an accumulation mode MOSFET, a surface channel layer is disposed on a p type base region between an n type source region and an n type epi layer. The surface channel layer is composed of an n type channel layer formed on the p type base region and a p type channel layer formed on the n type channel layer. A gate insulating film is formed on the p type channel layer. A channel is formed in the n type channel layer. Accordingly, channel mobility can be improved and on-resistance can be reduced without being affected by a state of an interface between the gate insulating film and the surface channel layer.

Silicon carbide semiconductor device and method for manufacturing the same

A vertical type power MOSFET made of silicon carbide includes a surface channel layer doped with nitrogen as dopant with a concentration equal to or less than 1.times.10.sup.15 cm.sup.-3. Accordingly, when a gate oxide film is formed on the surface channel layer, an amount of silicon nitride produced in the gate oxide film and at the interface between the gate oxide film and the surface channel layer becomes extremely small. As a result, carrier traps are prevented from being produced by silicon nitride, resulting in stable FET characteristics and high reliability to the gate oxide film.

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Okazaki, Japan

Shinji Amano