Hitachi Automotive Systems, Ltd.

Hitachi Astemo Ltd.

Ablic Inc.

Shinichirou Wada

Katsumi Ikegaya

Yoichiro Kobayashi

Tomohiko Yano

Takayuki Oshima

Keishi Komoriyama

Masato Kita

Hiroshi Yoneda

Masahito Sonehara

Kiyotaka Kanno

Yoshiaki Mizuhashi

There is provided a high withstand voltage LDMOS field-effect transistor that enables the compatibility of an increase of its withstand voltage and a decrease of its ON resistance. The high withstand voltage LDMOS is characterizing in including: a first electroconductive type body region formed on a main surface of a semiconductor substrate; a second electroconductive type source region formed on a surface of the body region; a second electroconductive type drift region formed so as to have contact with the body region; a second electroconductive type drain region formed on the drift region; a first electroconductive type buried region having contact with the body region and formed below the drift region; a gate electrode formed above the body region between the source region and the drift region and above the drift region nearer to the source region via a gate insulating film; a first field plate that extends from the gate electrode toward the drain region and that is formed above the drift region via a first insulating film; and a second field plate that has contact with the source region or the gate electrode and that is formed above the first field plate via a second insulating film, in which a distance between the buried region and the drain region is smaller than a distance between the first field plate and the drain region and larger than a distance between the second field plate and the drain region.

LDMOS with field plates

Provided is a power conversion device capable of observing a chip temperature with high accuracy without increasing a cost of the power conversion device mounted with a current sense element for observing a main current of a power device. A main control MOSFET, a current MOSFET, and a diodeconnected to a source electrodeof the main control MOSFETand a source electrodeof the current MOSFETare mounted in a chip of a power device, a temperature measurement circuitis connected to the source electrodeof the current MOSFET, and when the main control MOSFETis in an off state, a forward current (I) is caused to flow through the diode, and an anode potential is observed to measure the chip temperature.

Power conversion device configured to observe chip temperature

A power conversion apparatus accurately estimates a main current of a power device using observation of a sense current. The power conversion apparatus includes: an inverter circuit including a device having a main element and a sense element; a temporary-main-current estimator estimates a current flowing through the main element, from a sense current flowing through the sense element, as a temporary main current; a temperature-difference estimator configured to estimate a temperature difference between the main element and the sense element based on a gate drive signal for the main element and the temporary main current; a main-current corrector corrects the temporary main current using the estimated temperature difference and a temperature characteristic of on-resistance of the main element and output the corrected temporary main current as a corrected main current; and an inverter control circuit configured to output the gate drive signal based on the corrected main current.

Power conversion apparatus

Provided is a novel power conversion device that enables estimation of a temperature of a power device without using a temperature sensing diode and can accurately estimate a temperature and a current of a current sensing element that observes a main current. A measurement voltage (Vref) is applied between source terminals (and) of a main control elementand a current sensing elementin a state in which the main control elementand the current sensing elementare turned off, and a temperature of a power deviceis estimated from a current (Ib) flowing between the source terminals (and) of the main control elementand the current sensing elementat the time of the application by using the fact that a resistance value of a semiconductor substrate between the source terminals of the main control elementand the current sensing elementhas temperature dependency.

Power conversion device

There is a problem that an area of a principal current cell is reduced by an area of a bonding pad wiring layer for a sub-cell. A source electrodeof a current detection cellis electrically connected to a bonding pad wiring layerformed on an interlayer insulating filmvia a wiring layer contact. The bonding pad wiring layeris formed with respect to a source electrodeof a principal current cellso as to cover a part of the source electrodevia the interlayer insulating film. As a result, the source electrodeis miniaturized, and a size of the source electrodeis made substantially equal to a size of the current detection cell. Therefore, the current detection celland the principal current cellare disposed close to each other.

Semiconductor device including sub-cell disposed at chip center

Provided are a semiconductor device having small characteristic variations with time and high reliability and an in-vehicle control device using the same, the semiconductor device including a plurality of transistor elements constituting a current mirror circuit or a differential amplifier circuit that requires high relative accuracy. A semiconductor device includes a first metal-oxide-semiconductor (MOS) transistor, a second MOS transistor paired with the first MOS transistor, and insulation separation walls which insulate and separate elements from each other, wherein relative characteristics of the first MOS transistor and the second MOS transistor are in a predetermined range, the first MOS transistor and the second MOS transistor are relatively arranged in a gate width direction or a gate length direction, and distances between gate oxide films of the first MOS transistor and the second MOS transistor and the insulation separation walls facing the gate oxide films are the same as each other in a direction perpendicular to the gate width direction or the gate length direction.

Semiconductor device

An object is to provide a new electronic control unit that can improve detection accuracy of a sense current even in a region where the current value of the sense current is small. Provided is a sense current detection unit including a plurality of sense transistors that have different current flow rates and that are connected to current output transistors controlling a current flowing in a coil load. The current in the sense current detection unit is input to an analog/digital converter, and the current value of the current flowing in the sense current detection unit is converted into a digital value. The current value of the current flowing in the sense current detection unit is increased through a combination or a selection of the plurality of sense transistors of the sense current detection unit in a region where the current value of the main current of the current output transistors is small compared to a region where the current value of the main current is large.

Electronic control unit

Restraining a reduction in an electric current detection accuracy, which is due to the temperature difference between an output MOS transistor and a sense MOS transistor, and easing a limitation on the layout of the sense MOS transistor. A semiconductor device includes: an output MOS transistor that has an output transistor portion including a source, a gate, and a drain formed on a semiconductor chip, and outputs an electric current for driving an external load; and a sense MOS transistor that has a sense transistor portion including a source, a gate, and a drain formed on the semiconductor chip, and having a width equal to a transverse width of the output transistor portion, and that detects the electric current output from the output MOS transistor.

A semiconductor device obtains high current ratio accuracy by eliminating an influence of plasma charging using a MOS-type transistor in which a channel region is isolated and separated from a semiconductor substrate. In a current mirror circuit in which both of a well of a NMOS-type transistor that generates a bias and a well of a NMOS-type transistor that receives the bias are formed insulated and separated from a semiconductor substrate, a connection circuit is connected between gate electrodes and wells of NMOS-type transistors without through the semiconductor substrate, and the connection circuit makes the gate electrodes and the wells in an electrically short-circuited state during manufacturing of the current mirror circuit, and makes the gate electrodes and the wells in a disconnected state in at least one direction during a mounting operation.

Semiconductor integrated circuit device, current control device using semiconductor integrated circuit device, and automatic transmission control device using current control device

Provided is a vehicle-mounted semiconductor device enabling a temperature increase of active elements to be restricted. A vehicle-mounted semiconductor device includes: a semiconductor substrate; a plurality of active elements formed on the semiconductor substrate; a plurality of trenches surrounding the plurality of active elements to insulate and separate the active elements; and a terminal connecting in parallel the plurality of active elements insulated and separated by different trenches among the plurality of trenches and connected to an outside.

Semiconductor device, vehicle-mounted semiconductor device, and vehicle-mounted control device

A semiconductor device capable of enhancing uniformity of temperatures of transistors in an active clamp state while maintaining current performance is provided. A power transistor is connected to a power transistor in parallel. An active clamp circuit is provided in a path from a connection point between the power transistors to a gate of the power transistor and is conducted in a case where a voltage of the connection point exceeds a first threshold. An active clamp cutoff circuit is provided in a path from the active clamp circuit to a gate of the power transistor and cuts off or suppresses a current flowing into the path.

It is an object of the present invention to provide a switch element and a load driving apparatus capable of suppressing a characteristic change of an on-resistance without lowering an off-breakdown voltage. The switching element includes a control electrode, an active element region, and an inactive element region, and the active element region and the inactive element region are formed adjacent to each other on the control electrode. Alternatively, in the load driving apparatus including a current driving switch element and a current detecting switch element that is connected in parallel to the load driving switch element and that detects an energization current of the load driving switch element, the current detecting switch element includes at least a control electrode, an active element region, and an inactive element region, and the active element region and the inactive element region are formed adjacent to each other on the control electrode.

Switch element and load driving device

To provide a semiconductor device capable of restricting the substrate bias effect of a high-side transistor while enhancing the heat radiation property of a low-side transistor. A high-side NMOS transistoris formed in a region Son the surface of a SOI substrate. A trenchsurrounds the high-side NMOS transistor. SiO(first insulator) embeds the trench. A low-side NMOS transistoris formed in a region Son the surface of the SOI substratearound the trench. The side face Sf connecting the region Sforming the low-side NMOS transistortherein and the backside of the SOI substrateis exposed.

To provide a high-withstand-voltage lateral semiconductor device in which ON-resistance or drain current density is uniform at an end portion and a center portion of the device in a gate width direction. A lateral N-type MOS transistorformed on an SOI substrate includes a trench isolation structurefilled with an insulating film at an end portion of the transistor. An anode regionof a diodeis provided adjacent to a P-type body regionof the transistor through the trench isolation structureand a cathode regionof the diodeis also provided adjacent to an N-type drain-drift regionof the transistor through the trench isolation structureso as to cause electric field to be applied to the trench isolation structureto be zero when a voltage is applied across the transistor.

Growing community of inventors

Tokyo, Japan

Shinichirou Wada