Denso Corporation

Shinichiro Taguchi

Hideaki Ishihara

Kenji Yamada

Yoshinori Teshima

Naoki Ito

A microcomputer includes a CPU, multiple resources, and an output circuit having an address decoder. The CPU outputs an address signal to the address decoder. The address decoder decodes the address signal and the output circuit outputs a select signal to at least one of the resources in accordance with the decoded address signal. Each of the resources is writable by the CPU when receiving the select signal. When the address signal indicates a predetermined address, the output circuit outputs the select signal to at least two of the resources at a time. Thus, data can be written to the multiple resources at a time. Therefore, the CPU can write the data to the multiple resources within a reduced time by using the output circuit.

CPU address decoding with multiple target resources

A single-chip microcomputer includes a logic circuit, a CPU and a flip-flop for synchronizing an interrupt-request signal, which is supplied by the logic circuit to the CPU, based on a clock signal. A multi-chip emulation apparatus comprises a peripheral evaluation chip, a CPU evaluation chip and a device, which are used for emulating functions of the logic circuit, the CPU and the flip-flop respectively. When the multi-chip emulation apparatus is used for emulating functions of the single-chip microcomputer in the development, the device for emulating functions of the flip-flop synchronizes the interrupt-request signal to absorb a delay time incurred by the interrupt-request signal due to a physical distance between the peripheral evaluation chip and the CPU evaluation chip so that an interrupt-handling timing in the emulation matches an interrupt-handling timing in the real operation of the single-chip microcomputer.

Growing community of inventors

Nukata-gun, Japan

Shinichiro Taguchi