Renesas Technology Corp.

Hitachi, Ltd.

Renesas Electronics Corporation

Other

Hitachi Ulsi Engineering Corp.

Hitachi Engineering Co., Ltd.

Shinichiro Mitani

Shuji Ikeda

Toshiaki Yamanaka

Akihiro Shimizu

Kazushige Sato

Kenichi Kikushima

Akira Fukami

Masaya Iida

Nobuyasu Kanekawa

Atsuo Watanabe

Takahide Ikeda

Yasuyuki Kojima

Minehiro Nemoto

Takayuki Iwasaki

Seigoh Yukutake

Katsuhiro Furukawa

Chiyoshi Kamada

Masatsugu Amishiro

Takayuki Oouchi

Naoki Yamamoto

Tomohiro Saito

Yoshikazu Tanabe

Kazutaka Mori

Hisayuki Higuchi

Katsuhiko Ichinose

Yuko Hanaoka

Youhei Yanagida

Hiroyuki Kojima

Nobuyoshi Natsuaki

Takeshi Kimura

Hiroo Masuda

Nobuhiro Konishi

Hidefumi Ito

Katsumi Tsuneno

Kimiko Aoyama

Hisako Sato

Takahide Nakamura

Yuuichirou Taguma

A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer constituting the individual gate electrodes of the drive MISFETs, the transfer MISFETs and the load MISFETs of the memory cell and in which a reference voltage line formed over the local wiring lines is arranged to be superposed over the local wiring lines to form a capacity element. Moreover, the capacity element is formed between the local wiring lines and the first conducting layer by superposing the local wiring lines over the first conducting layer. Moreover, the local wiring lines are formed by using resistance lowering means such as silicification. In addition, there are made common the means for lowering the resistance of the gate electrode of the transfer MISFETs and the means for forming the local wiring lines.

Semiconductor integrated circuit device and process for manufacturing the same

A communication system is provided including a transceiver and an application controller to transmit and receive signals through the transceiver. An isolator which insulates and separates the transceiver and application controller includes primary and secondary side circuits insulated from each other on a substrate and a capacitive insulating means to transfer signals between the primary and second sides while insulating and separating the primary side circuit from the secondary side circuit.

Isolator and a modem device using the isolator

An impurity ion of a polarity opposite to that of an impurity ion forming an n-type diffusion layer is implanted into a lower portion of the n-type diffusion region in a region, in which n-channel type MISFET is to be formed, vertically with respect to a main surface of a semiconductor to form a first p-type pocket layer. Subsequently, an impurity of a p conduction type is implanted into a region between the n-type diffusion region and the first p-type pocket layer obliquely relative to the main surface of the semiconductor substrate to form a second p-type pocket layer. In this arrangement, the concentration of the impurity ion forming the second p-type pocket layer is made higher than the concentration of the impurity ion used to form the first p-type pocket layer.

Semiconductor integrated circuit device and method of manufacturing the same

Growing community of inventors

Tokorozawa, Japan

Shinichiro Mitani