Fuji Electric Co., Ltd.

Novartis Ag

Fuji Electric Systems Co. Ltd.

Mitsubishi Electric Corporation

Smithkline Beecham Corporation

Fuji Electric Holdings Co., Ltd.

Shinichiro Matsunaga

Naoto Fujishima

Werner Breitenstein

Mutsumi Kitamura

Akio Sugi

Genji Iwasaki

Kenji Hayakawa

Junichi Sakaki

Takanori Kanazawa

Motowo Nakajima

Shinichi Koizumi

Tatsuhiko Kasaoka

Jerry Leroy Adams

Akihiro Koyama

Manabu Takei

Hidekazu Tsuchida

Koji Nakayama

Takeshi Tawara

Domingos J Silva

Jun Tang

Deborah Lynne Bryan

Yoshiyuki Yonezawa

Tomonori Mizushima

Takeshi Yokoyama

Tomonori Seki

Atsushi Maruyama

Mitsuru Sometani

Hideyuki Sato

Yanhong Feng

Kensuke Takenaka

Yasushi Miyazaki

Marcus Semones

Yutaka Maeda

Kouichi Murata

Yuji Kiuchi

Masaaki Ochiai

Masato Nakano

Jean-Philippe Rocher

A semiconductor device includes a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type; a first semiconductor region of a second conductivity type; a second semiconductor region of the first conductivity type; a trench; a gate insulating film; a gate electrode; a third semiconductor region of the second conductivity type; a fourth semiconductor region of the second conductivity type; a fifth semiconductor region of the first conductivity type, selectively provided in the second semiconductor layer and having an impurity concentration lower than an impurity concentration of the second semiconductor layer; a first electrode; and a second electrode. The fifth semiconductor region has one surface in contact with the first semiconductor region, another surface in contact with the third semiconductor region, and a side surface in contact with the gate insulating film.

Semiconductor device

A silicon carbide semiconductor device has an active region and a termination structure portion disposed outside of the active region. The silicon carbide semiconductor device includes a semiconductor substrate of a second conductivity type, a first semiconductor layer of the second conductivity type, a second semiconductor layer of a first conductivity type, first semiconductor regions of the second conductivity type, second semiconductor regions of the first conductivity type, a gate insulating film, a gate electrode, a first electrode, and a second electrode. During bipolar operation, a smaller density among an electron density and a hole density of an end of the second semiconductor layer in the termination structure portion is at most 1×10/cm.

Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device

A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a second semiconductor layer of a second conductivity type, first semiconductor regions of the first conductivity type, second semiconductor regions of the second conductivity type, third semiconductor regions of the second conductivity type, provided in the second semiconductor layer at positions facing the first semiconductor regions in a depth direction and having an impurity concentration higher than an impurity concentration of the second semiconductor layer, trenches, gate insulating films, gate electrodes, a first electrode, a second electrode, and third electrodes. The third electrodes form Schottky junctions with the second semiconductor layer and are provided on the surface of portions of the second semiconductor layer free of the third semiconductor regions.

Silicon carbide semiconductor device

A silicon carbide semiconductor device includes first semiconductor areas and second semiconductor areas. The first semiconductor areas have a first semiconductor layer of a second conductivity type, a second semiconductor layer of a first conductivity type, first semiconductor regions of the second conductivity type, second semiconductor regions of the first conductivity type, gate electrodes, and first electrodes. The second semiconductor areas have the first semiconductor layer, the second semiconductor layer, third semiconductor regions of the second conductivity type, the gate electrodes, and the first electrodes. The first semiconductor regions include low- impurity-concentration regions and high-impurity-concentration regions. The third semiconductor regions have a potential equal to that of the first electrodes. The first semiconductor regions are connected to the third semiconductor regions by MOS structures. In the first semiconductor regions, the high-impurity-concentration regions are provided at positions different from positions facing the first electrodes.

A semiconductor device includes an n-type drift layer of an formed on an n-type SiC substrate; a p-type layer provided on a surface opposite that facing the n-type SiC substrate; and an n-type buffer layer provided, as a recombination promoting layer, between the n-type drift layer and the n-type SiC substrate, the n-type buffer layer having an impurity concentration higher than that of the n-type drift layer. In the buffer layer, as a recombination site, a defect energy-level is introduced at a high concentration of 1&#xd7;10/cmor higher. The buffer layer promotes internal electron-hole recombination and without applying high energy to BPDs at an interface of the buffer layer and the SiC substrate, may reduce the amount of recombination near the interface even at a current density equivalent to that of a conventional structure and thereby, prevents characteristics degradation at the time of operation.

Semiconductor device and method of manufacturing thereof

A semiconductor device can reduce the number of bonding wires. The semiconductor device includes two or more semiconductor elements each of which has electrodes on a first main surface and a second main surface, an electrode plate that has one surface which is bonded to electrodes on the first main surfaces of the semiconductor elements, with a first bonding material layer interposed therebetween, and extends over the electrodes on the first main surfaces of the two or more semiconductor elements, and a conductive plate that includes a first lead terminal and a semiconductor element bonding portion which is bonded to electrodes on the second main surfaces of the semiconductor elements. A second bonding material layer is interposed therebetween, and is connected to the electrodes on the second main surfaces of the two or more semiconductor elements.

Semiconductor device and method for manufacturing the same

An edge termination structure that surrounds an active region is disposed outside the active region. In the active region, a MOS gate structure is disposed. Inside an n-type drift layer, an n-type CS region that becomes a minority carrier barrier is disposed in a surface layer on a p-type base layer side. The n-type CS region is disposed in the active region and is not disposed in the edge termination structure. Thus, the impurity concentration of the n-type drift layer inside the edge termination structure is low enough to enable high breakdown voltage to be realized. In the n-type drift layer, which has a low impurity concentration, a JTE structure that is formed from first and second JTE regions is disposed.

A semiconductor device having a low on resistance and high integration level with respect to the surface area of a substrate is provided. In the semiconductor device, a first trench, a second trench, and a third trench are provided in an element formation region provided on a semiconductor substrate. Metal is deposited within the first trench and second trench, to form a drain electrode and a source electrode, respectively. Polysilicon is deposited inside the third trench with a gate insulating film intervening, and a gate electrode is formed.

Semiconductor device with low on resistance

A bidirectional Trench Lateral Power MOSFET (TLPM) can achieve a high breakdown voltage and a low on-resistance. A plurality of straight-shaped islands having circular portions at both ends are surrounded by a trench arrangement. The islands provide first n source regions and a second n source region is formed on the outside of the islands. With such a pattern, the breakdown voltage in the case where the first n source regions are at a high potential can be higher than the breakdown voltage in the case where the second n source region is at a high potential. Alternatively, in the case of not changing the breakdown voltage, the on-resistance can be reduced.

Semiconductor device, battery protection circuit and battery pack

&#x3b1;-Amino hydroxamic acid derivative of the formula I, in which R is C-C-alkyl, which is mono-, di- or trisubstituted by halogen, nitro, lower acyloxy, trifluoromethoxy, cyano, C-C-cycloalkyl or unsubstituted or substituted C-C-heteroaryl comprising one or two heteroatoms selected from the group consisting of O, S and N; or C-C-alkenyl or C-C-alkynyl, which in each case is unsubstituted or mono-, di- or trisubstituted by halogen, nitro, lower acyloxy, trifluoromethoxy, cyano, C-C-cycloalkyl or unsubstituted or substituted C-C-heteroaryl comprising one or two heteroatoms selected from the group consisting of O, S and N;and the other symbols are as defined in claimare described. These compounds are MMP and in particular MMP2 inhibitors and can be used for treatment of MMP dependent diseases, in particular inflammation conditions, rheumatoid arthritis, osteoarthritis, tumors (tumor growth, metastasis, progression or invasion) and pulmonary disorders (e.g. emphysema, COPD).

Arylsulfonamido-substituted hydroxamic acid derivatives

A battery protective device that protects against battery damage and semiconductor destruction from overdischarge and overcharge of the battery. Resistance across switching elements is controllable to prevent current leakage through parasitic dipole elements in the integrated circuit. Current is detected with an overdischarge detecting circuit and an overcharge detecting circuit. Direction of the current to/from the battery is detected by discharge overcurrent and charge overcurrent detecting circuits. Switching discharge FETs and charge FETs are enabled as independently controlled, ON-OFF parallel switching elements, interposed in series in the charge/discharge current path of the battery. Only a part of the discharge or charge switching FETs can be turned ON and OFF for accurate current control in accordance with the detected current and its direction.

Battery protective device and semiconductor integrated circuit device

Furo- and thienopyrimidine derivatives, which are useful as TIE-2 and/or VEGFR-2 inhibitors are described herein. The described invention also includes methods of making such furo- and thienopyrimidine derivatives as well as methods of using the same in the treatment of hyperproliferative diseases.

4-Amino-2,3-disubstituted thieno[2,3-d]pyrimidines and pharmacetical compositions thereof

&#x3b1;-Amino hydroxamic acid derivative of formula (I), in which R is C&#x2013;C-alkyl, which is mono-, di- or trisubstituted by halogen, nitro, lower acyloxy, trifluoromethoxy, cyano, C&#x2013;C-cycloalkyl or unsubstituted or substituted C&#x2013;C-heteroaryl comprising one or two heteroatoms selected from the group consisting of O, S and N; or C&#x2013;C-alkenyl or C&#x2013;C-alkynyl, which in each case is unsubstituted or mono-, di- or trisubstituted by halogen, nitro, lower acyloxy, trifluoromethoxy, cyano, C&#x2013;C-cycloalkyl or unsubstituted or substituted C&#x2013;C-heteroaryl comprising one or two heteroatoms selected from the group consisting of O, S and N; and the other symbols are as defined in claim, are described. These compounds are MMP and in particular MMP2 inhibitors and can be used for treatment of MMP dependent diseases, in particular inflammation conditions, rheumatoid arthritis, osteoarthritis, tumors (tumor growth, metastasis, progression or invasi n) and pulmonary disorders (e.g. emphysema, COPD).

A bidirectional main switch includes two main switches Mand Mformed of two main MOSFET'S Qand Q, respectively; a bidirectional mirror switch including two mirror switches Mand Mformed of two mirror MOSFET'S Qand Q, respectively, both being formed so as to allow a small current (a mirror current) to flow therein in a specified ratio to a current in the main MOSFET'S Qand Q; and an operational amplifier Opforming feed back amplifying circuit having power supplied from two power sources. Thus, a bidirectional current flowing in the bidirectional main switch for cutting off an excessive charge current and an excessive discharge current of a battery E can be detected by a simple circuit with low power losses and a high accuracy.

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Matsumoto, Japan

Shinichiro Matsunaga