Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Shinichi Sumi

Toshiaki Kawasaki

Yasuhiro Agata

Masanori Shirahama

Ryuji Nishihara

Yasue Yamamoto

Hirohito Kikukawa

A system LSI includes an input/output section and a logic circuit section. The input/output section includes an I/O power source cell having a supply voltage higher than a power source for the logic circuit section and a plurality of I/O cells in each of which an I/O power source line is provided for supplying source power from the I/O power source cell. The logic circuit section includes an I/O power consuming circuit which uses the I/O power source cell as a power source. The I/O power consuming circuit is connected to a line leading from an I/O power source line in at least one of the plurality of I/O cells.

System LSI

A first transistor is connected in series with one end of a fuse element. A second transistor is connected in series with the other end of the fuse element. A current flows through the fuse element when both the first and second transistors are turned on.

Electric fuse circuit available as one time programmable memory

A gate of a MOS transistor connected to a fuse device in series is controlled by an AND circuit connected to the same power source as the fuse device is connected, thereby pulling down one input of the AND circuit to a ground. Thus, misprogramming of the fuse device when an LSI power source is turned ON/OFF can be prevented.

Electrical fuse circuit

The invention provides an electrical fuse device comprising: a plurality of fuse cores, each having an electrical fuse element and a switching element serially connected to the electrical fuse element; a program control circuit generating a program shift signal by sequentially shifting a program control transmission signal in synchronization with an effective program clock signal and subsequently generating a program signal to be sent to each of the switching elements in the plurality of fuse cores based on program data and the program shift signal; and a program clock control circuit controlling the conducting and non-conducting states of a program clock signal in accordance with a program clock enable signal and, when the program clock signal is in a conducting state, transmitting the program clock signal to the program control circuit as the effective program clock signal.

Electrical fuse device

Electrical fuse blocks () of a plurality of stages are provided each of which includes a plurality of electrical fuse cores (). The electrical fuse block () includes a program shift register block () made up of shift registers () which are disposed for the respective electrical fuse cores (), sequentially transmit program enable signal FPGI, and output the program enable signal FPGI to the NMOS transistors () of the electrical fuse cores (). When performing programming according to programming decision signal PBn, the program shift register block () transmits the program enable signal FPGI. When not performing programming, the program shift register block () skips the program enable signal FPGI.

Semiconductor storage device including electrical fuse module

An electrical fuse circuit of the present invention includes a plurality of electrical fuse cores () each of which has an electrical fuse element () and a switch transistor () connected in series with each other, and shift registers () connected to the plurality of electrical fuse cores () to program the electrical fuse elements (). Program enable signals (Si) are sequentially generated and transferred by the shift registers (), the switch transistors () are sequentially brought into conduct according to the program enable signals (Si) and the information of program data (Di), and the electrical fuse elements () are blown one by one.

Growing community of inventors

Hyogo, Japan

Shinichi Sumi