Renesas Sp Drivers Inc.

Shinichi Ogou

Takashi Tamura

Keiichi Itoigawa

Jun Kurosawa

A receiver is composed of a receiver-side amplifier which receives a clock signal, a receiver-side amplifier which receives a data signal, a variable delay circuit which generates a delay-adjusted clock signal and a delay-adjusted data signal by delaying the clock signal and the data signal, a latch circuit section which latches the delay-adjusted data signal in synchronous with the delay-adjusted clock signal, and a skew detecting circuit which generates skew detection data that by latching a specific data sequence transmitted as the data signal in synchronous with a first clock signal to Nclock signal (N is an integer equal to or more than 2) with different delay times from the clock signal. The delay time in the variable delay circuit is controlled according to the skew detection data.

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Tokyo, Japan

Shinichi Ogou