Hitachi Cable, Inc.

Konica Minolta, Inc.

Shinichi Muramatsu

Fumihito Oka

Yasushi Minagawa

Susumu Takahashi

Makiko Ootani

Harunori Sakaguchi

Keizou Takano

Tsuruki Tamura

Tadashi Sasaki

Yasushi Minakawa

Provided is a measurement method with which an analyte in a sample containing a high concentration of the analyte can be measured with high accuracy without diluting the sample in multiple stages. An embodiment of the present invention relates to a measurement method for measuring an amount of an analyte in a sample, the method including: a binding step of providing the sample to a containing part of a measuring chip including the containing part for containing liquid, and a first capture body immobilized inside the containing part and having a recognition site that specifically binds to the analyte so as to bind the analyte contained in the sample to the first capture body; and a measurement step of measuring an amount of the analyte bound to the first capture body. The measurement method includes an adjustment step in which a second capture body having a recognition site that specifically binds to the analyte is bound to a part of the analyte in the sample in parallel with the binding step or before the binding step so as to reduce the amount of the analyte capable of binding to the first capture body.

Measurement method, and measuring chip and measuring kit used for the same

Provided is a fluorescence immunoassay sensor chip and a fluorescence immunoassay method, which are capable of measuring, at the same time, a marker requiring high sensitivity due to its low content in a sample solution and a marker not requiring high sensitivity due to its high content in a sample solution. The fluorescence immunoassay sensor chip for use in fluorescence immunoassay for detecting and measuring markers contained in a sample solution includes: a dielectric member; a metal thin film formed on part of a main surface of the dielectric member; a first sensor part formed in a predetermined position on the metal thin film; and a second sensor part directly formed in a predetermined position on the dielectric member, wherein a ligand immobilized in the first sensor part and a ligand immobilized in the second sensor part capture different types of markers.

Fluorescence immunoassay sensor chip and fluorescence immunoassay method

A transparent electrode is provided on a glass substrate, and an amorphous silicon layer is provided on the transparent electrode. A nickel layer as a metal catalyst element is provided in or so as to contact with the surface of the amorphous silicon layer, followed by heat treatment to crystallize the amorphous silicon layer, thereby forming a p-type polycrystalline silicon layer. This polycrystalline silicon layer is crystallographically oriented and has high crystallinity. The polycrystalline silicon layer is used as a seed crystal to form a p-type polycrystalline silicon layer which is crystallographically oriented and, at the same time, has high crystallinity. Further, an i-type polycrystalline silicon layer and an n-type polycrystalline silicon layer are successively formed on the polycrystalline silicon layer. By virtue of the above construction, a crystalline silicon thin film semiconductor device, a crystalline silicon thin film photovoltaic device, and a process for producing a crystalline silicon thin film semiconductor device can be provided which can realize high crystallinity of polycrystalline silicon, crystallographic orientation, high characteristics, and excellent productivity.

Crystalline silicon thin film semiconductor device, crystalline silicon thin film photovoltaic device, and process for producing crystalline silicon thin film semiconductor device

Concave and convex are formed on the substrate , the amorphous silicon layer is formed on the metallic catalyst dispersed and arranged in a dotted shape in the concave portion of the concave and convex, the crystal phases having respective orientations from the metallic catalyst are grown, further the crystal phases are integrated with each other by continuing heat treatment and the polycrystalline silicon layer is formed. A crystalline silicon semiconductor device and its method for fabrication which are costly advantageous and capable of efficiently forming the polycrystalline silicon layer of a predetermined thickness needed as a semiconductor device are provided. Moreover, on the substrate , the polycrystalline silicon layer oriented on the face (111), the metallic catalyst consisted of Ni, the polycrystalline silicon layer are formed in turn, further, after on which the amorphous silicon layer of the predetermined thickness is formed, Ni element is diffused within the amorphous silicon layer from the metallic catalyst layer by performing heat treatment, and thereby crystallizing the amorphous silicon layer into the polycrystalline silicon layer

Crystalline silicon semiconductor device and method for fabricating same

A plurality of linear catalytic metal element portions are arranged at predetermined intervals just on or just beneath an amorphous silicon layer, and, in this state, the amorphous silicon layer is heat treated to crystallize the amorphous silicon layer and consequently to form a polycrystalline silicon layer. This construction can realize the provision of a method for the formation of an evenly oriented, high-quality crystalline silicon layer in a large area, and a crystalline silicon semiconductor device produced by this method.

Method for forming crystalline silicon layer and crystalline silicon semiconductor device

At least a part of the surface of a crystalline silicon semiconductor substrate is rendered porous to convert at least a part of the crystalline silicon semiconductor substrate to a porous silicon layer. A catalytic metal layer is formed on the porous silicon layer. An amorphous silicon thin film is formed on the catalytic metal layer. The amorphous silicon thin film is heated to monocrystallize the amorphous silicon thin film, thereby converting the amorphous silicon thin film to a crystalline silicon thin film. The crystalline silicon semiconductor substrate, provided with the crystalline silicon thin film, is joined to a support substrate so that the crystalline silicon thin film faces the support substrate. The crystalline silicon semiconductor substrate, together with the porous silicon layer, which is the crystalline silicon semiconductor substrate in its portion converted to a porous layer, is separated and removed from the crystalline silicon thin film joined to the support substrate. By virtue of the above constitution, a process for producing a crystalline silicon thin film can be realized which enables, for example, the temperature required in the production process of a crystalline silicon thin film to be lowered to improve the quality of the crystalline silicon thin film, can realize close control of a steep dopant concentration gradient and the like, and can produce a crystalline silicon thin film suitable for an increase in fabrication density and a reduction in layer thickness of semiconductor devices.

Growing community of inventors

Tokyo, Japan

Shinichi Muramatsu