Rohm Co., Ltd.

Panasonic Intellectual Property Management Co., Ltd.

Panasonic Corporation

Shinichi Kohda

Masahiro Ishida

Daisuke Nakagawa

Kenichiro Tanaka

Yoshinori Tanaka

Takao Fujimori

Masahiro Murayama

Yuji Ishida

Tetsuzo Ueda

Yasuhiro Yamada

Ryosuke Usui

Naohide Wakita

Daisuke Shibata

Junichi Kimura

Jun Shimizu

Hiroaki Ohta

Yoh Takano

Tomohide Ogura

A light-receiving circuit receives light emitted by a light-emitting part and generates an energization signal that is an electric current based on intensity of the light. A hold circuit is configured to supply an electric charge of an energization signal to a high electric potential terminal and not to decrease a voltage of the high electric potential terminal in a case where a control circuit is sending an OFF signal. Furthermore, the hold circuit is configured not to supply the electric charge of the energization signal to the high electric potential terminal and to keep the voltage of the high electric potential terminal in a case where the control circuit is sending an ON signal. A comparison circuit compares a comparison signal and a reference signal, generates a bias voltage based on a result of the comparison between the comparison signal and the reference signal, and feeds back the bias voltage as a reference signal. A driving circuit supplies the bias voltage to a reference terminal while the control circuit is sending the OFF signal.

Power conversion circuit

This semiconductor device includes a semiconductor element mounted on a metal layer, first to third connection terminals that are provided on the semiconductor element, a first bus bar bonded to the first connection terminal, and a second bus bar bonded to the second connection terminal. The semiconductor element is bonded to the metal layer, and the first to third connection terminals are disposed on a top surface of the semiconductor element. One end of the first bus bar is bonded to the first connection terminal, another end of the first bus bar is an output unit, one end of the second bus bar is bonded to the second connection terminal, and another end of the second bus bar is bonded to the metal layer. A first surface of the semiconductor element and the second bus bar are at an identical potential.

Semiconductor device having a plurality of top surface connection terminals

A nitride semiconductor device according to the present disclosure includes a substrate; a first nitride semiconductor layer which is formed on the substrate, and which has a C-plane as a main surface; a second nitride semiconductor layer which is formed on the first nitride semiconductor layer, and which has p-type conductivity; and a first opening which is formed in the second nitride semiconductor layer, and which reaches the first nitride semiconductor layer. The nitride semiconductor device further includes a third nitride semiconductor layer which is formed so as to cover the first opening in the second nitride semiconductor layer; a first electrode which is formed on the third nitride semiconductor layer so as to include a region of the first opening; and a second electrode which is formed on the rear surface of the substrate.

Nitride semiconductor device

A field-effect transistor includes a codoped layer made of AlGaN (0&#x2266;x&#x2266;1) and formed on a p-type Si substrate, a GaN layer formed on the codoped layer, and an AlGaN layer formed on the GaN layer. The codoped layer contains C and Si as impurity elements. The impurity concentration of C in the codoped layer is equal to or higher than 5&#xd7;10/cm. The impurity concentration of Si in the codoped layer is lower than the impurity concentration of C. The impurity concentration of C in the GaN layer is equal to or lower than 1&#xd7;10/cm. The thickness of the GaN layer is equal to or greater than 0.75 &#x3bc;m.

Field-effect transistor

An object of the present invention is to provide a nitride semiconductor device and a nitride semiconductor substrate in each of which a nitride semiconductor layer formed on a silicon substrate is improved in crystallinity to realize a decrease in on-resistance of a field-effect transistor. The nitride semiconductor device includes a silicon substrate, and a first nitride semiconductor layer formed over the silicon substrate and including a nitride semiconductor, wherein a Si &#x3c;111&#x3e; axial direction of the silicon substrate is different from a &#x3c;0001&#x3e; axial direction of the first nitride semiconductor layer.

Nitride semiconductor device and nitride semiconductor substrate

A nitride based semiconductor device includes: an n-type cladding layer; an n-type GaN based guide layer placed on the n-type cladding layer; an active layer placed on the n-type GaN based guide layer; a p-type GaN based guide layer placed on the active layer; an electron block layer placed on the p-type GaN based guide layer; a stress relaxation layer placed on the electron block layer; and a p-type cladding layer placed on the stress relaxation layer, and the nitride based semiconductor device alleviates the stress occurred under the influence of the electron block layer, does not affect light distribution by the electron block layer, reduces threshold current, can suppress the degradation of reliability, can suppress degradation of the emitting end surface of the laser beam, can improve the far field pattern, and is long lasting, and fabrication method of the device is also provided.

Nitride based semiconductor device and fabrication method for the same

A nitride semiconductor element includes: a strain suppression layer formed on a silicon substrate via an initial layer; and an operation layer formed on the strain suppression layer. The strain suppression layer includes a first spacer layer, a second spacer layer formed on and in contact with the first spacer layer, and a superlattice layer formed on and in contact with the second spacer layer. The first spacer layer is larger in lattice constant than the second spacer layer. The superlattice layer has first layers and second layers smaller in lattice constant than the first layers stacked alternately on top of one another. The average lattice constant of the superlattice layer is smaller than the lattice constant of the first spacer layer and larger than the lattice constant of the second spacer layer.

Nitride semiconductor element

A method of manufacturing a semiconductor light emitting device employs a substrate formed by successively stacking an n-type semiconductor layered portion including an AlGaN layer, a light emitting layer containing In and a p-type semiconductor layered portion on a group III nitride semiconductor substrate having a larger lattice constant than AlGaN. This method includes the steps of selectively etching the substrate from the side of the p-type semiconductor layered portion along a cutting line to expose the AlGaN layer along the cutting line, forming a division guide groove along the cutting line on the exposed AlGaN layer, and dividing the substrate along the division guide groove.

Method of manufacturing light emitting device with a pair of ridge protection electrodes

A nitride semiconductor laser device is formed by growing a group III nitride semiconductor multilayer structure on a substrate. The group III nitride semiconductor multilayer structure has a laser resonator including an n-type semiconductor layer, a p-type semiconductor layer and a light emitting layer held between the n-type semiconductor layer and the p-type semiconductor layer. The laser resonator is arranged to be offset from the center with respect to a device width direction orthogonal to a resonator direction toward one side edge of the device. A wire bonding region having a width of not less than twice the diameter of an electrode wire to be bonded to the device is formed between the laser resonator and the other side edge of the device.

Nitride semiconductor laser device and method of manufacturing the same

A method of manufacturing a nitride semiconductor device includes the steps of: forming a division guide groove by applying a laser beam having a wavelength and energy density causing multiphoton absorption to a surface of a substrate having a group III nitride semiconductor layer grown on a major surface thereof; removing deposits from the surface of the substrate by applying a laser beam having the wavelength to the surface of the substrate at energy density causing substantially no multiphoton absorption on the substrate; and dividing the substrate along the division guide groove.

Nitride semiconductor device and method of manufacturing the same

A nitride semiconductor laser device is formed by growing a group III nitride semiconductor multilayer structure on a substrate containing no Al. The group III nitride semiconductor multilayer structure forms a structure including an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer held between the n-type semiconductor layer and the p-type semiconductor layer. The n-type semiconductor layer includes an n-type cladding layer containing Al and an n-type guide layer having a smaller band gap than the n-type cladding layer. The p-type semiconductor layer includes a p-type cladding layer containing Al and a p-type guide layer having a smaller band gap than the p-type cladding layer. A removal region is formed by partially removing the layers containing Al in the group III nitride semiconductor multilayer structure from the substrate.

Nitride semiconductor laser device

A nitride semiconductor laser device has a group III nitride semiconductor multilayer structure. The group III nitride semiconductor multilayer structure includes an n-type semiconductor layer, a p-type semiconductor layer and a light emitting layer held between the n-type semiconductor layer and the p-type semiconductor layer, and the p-type semiconductor layer is formed by successively stacking a p-side guide layer, a p-type electron blocking layer in contact with the p-side guide layer and a p-type cladding layer in contact with the p-type electron blocking layer from the side closer to the light emitting layer. The p-side guide layer is formed by stacking a layer made of a group III nitride semiconductor containing Al and a layer made of a group III nitride semiconductor containing no Al. The p-type cladding layer is made of a group III nitride semiconductor containing Al, and the p-type electron blocking layer is made of a group III nitride semiconductor having a larger Al composition than the p-type cladding layer.

Processed traces are formed on at least a part of intended cutting lines A along which a wafer () where a nitride semiconductor lamination portion () is formed on a GaN based substrate () is divided into chips, by irradiating with a laser beam LB having a wavelength which is longer than the band gap wavelength of the GaN based substrateand an electrical field intensity which causes a multiple photons absorption, while adjusting the focal point to a constant depth d within the GaN based substrate () from the back surface of the wafer. After that, the wafer () is divided into chips along cutting starting points () which are formed in the vicinity of the processed traces by hitting with an impact. As a result, the wafer can be easily divided into chips, and in particular, end faces of a resonator can be formed with cleavage planes when an LD is formed.

Growing community of inventors

Kyoto, Japan

Shinichi Kohda