Kioxia Corporation

Toshiba Memory Corporation

Kabushiki Kaisha Toshiba

Toshiba Memory Coiporation

Kioxia Corporaton

Kioxia Corportion

Shinichi Kanno

Shigehiro Asano

Hideki Yoshida

Toshikatsu Hida

Kazuhiro Fukutomi

Hirokuni Yano

Kazuya Kitsunai

Naoki Esaka

Junji Yano

Kenichiro Yoshii

Hidenori Matsuzaki

Hironori Uchikawa

Hiroshi Nishimura

Daisuke Hashimoto

Hiroshi Yao

Masaya Tarui

Takahiro Kurita

Yukimasa Miyamoto

Taku Ohneda

Osamu Torii

Kosuke Hatsuda

Hiroshi Murayama

Takehiko Kurashige

Hideaki Sato

Takashi Fukushima

Yasuhito Yoshimizu

Keisuke Nakatsuka

Koichi Nagai

Tomoya Sanuki

Masayuki Miura

Koji Horisaki

Toshio Fujisawa

Kensaku Yamaguchi

Tatsuro Hitomi

Arata Inoue

Riku Ogawa

Masanobu Shirakawa

Daisaburo Takashima

Tatsunori Kanai

Hiroshi Yoshida

Seiji Maeda

Takeshi Ishihara

Yasuhiko Kurosawa

Minoru Namekata

Takeshi Tomizawa

Naomi Takeda

Hiroshi Tsurumi

Yasushi Nagadomi

Yuzo Tamada

Toshio Shirakihara

Yasuyuki Ushijima

Yosuke Kuroda

Naoki Sawai

Dong Zhang

Hiroyuki Nagashima

Tetsuro Kimura

Masataka Goto

Ryo Yamaki

Akira Yamaga

Tetsuya Sunata

Yohei Hasegawa

Yasuhiro Kimura

Yoshiki Saito

Aurelien Nam Phong Tran

Kazumasa Yamamoto

Taku Ooneda

Kohei Okuda

Hida Toshikatsu

Yuki Sasaki

According to one embodiment, a computing system transmits to a storage device a write request designating a first logical address for identifying first data to be written and a length of the first data. The computing system receives from the storage device the first logical address and a first physical address indicative of both of a first block selected from blocks except a defective block by the storage device, and a first physical storage location in the first block to which the first data is written. The computing system updates a first table which manages mapping between logical addresses and physical addresses of the storage device and maps the first physical address to the first logical address.

Computing system and method for controlling storage device

According to one embodiment, a memory system includes a nonvolatile memory including dies, a controller, and a first queue, a second queue, and a command buffer provided for each die. In response to a read command to be executed being stored in the command buffer corresponding to a first die, the controller determines whether or not a next read command needs to be issued. In response to determining that the next read command needs to be issued, the controller identifies a second die in which second data subsequent to first data corresponding to the read command to be executed is stored, and stores a read command to read the second data in the second queue corresponding to the second die.

Memory system and method of controlling nonvolatile memory

According to one embodiment, a memory system includes a controller. The controller manages a plurality of flags corresponding to a plurality of physical addresses. In response to receiving a read command from a host, the controller acquires from a first management table a physical address mapped to a logical address specified by the read command, and reads data from a nonvolatile memory based on the acquired physical address. The controller determines whether or not to transmit the read data to the host based on whether a current status of the flag corresponding to the acquired physical address is set to a first value indicating valid data or to a second value indicating invalid data.

Memory system and method of controlling the memory system

According to one embodiment, in response to receiving, from a host, one or more second type commands, a controller of the storage device maintains the received one or more second type commands in a memory region in the storage device without completing processing of the received one or more second type commands. In response to receiving the first type command from the host, the controller completes processing of a second type command, and transmits a command completion response for the first type command to the host as a first preceding response for the first type command. In response to completion of processing of the first type command, the controller transmits a command completion response for the first type command to the host.

Storage device and storage system

According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.

Memory system and method for controlling nonvolatile memory

According to one embodiment, when a command executed in a nonvolatile memory is an erase/program command and when a cumulative weight value satisfies a condition that a first input is selected as an input of high priority, a memory system suspends execution of the erase/program command by transmitting a suspend command to the nonvolatile memory. The memory system repeats executing an operation of starting the execution of one read command of the first input and an operation of updating the cumulative weight by using the weight associated with the read command until read command no longer exists in the first input or until the condition that the cumulative weight is larger than the first value is not satisfied, and resumes the execution of the suspended erase/program command.

A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.

Semiconductor memory device and method of controlling the same

According to one embodiment, a memory system includes a nonvolatile memory, a first write buffer, a second write buffer having a capacity smaller than that of the first write buffer and a bandwidth larger than that of the first write buffer, and a controller. When the write speed of the first group is less than a first value, the controller loads unloaded data among first data into the first write buffer, and after an amount of the first data reaches or exceeds a minimum write size, writes the first data to a first write destination block. When the write speed of the second group is greater than or equal to the first value, the controller loads second data having the minimum write size into the second write buffer and writes the second data to the second write destination block.

According to one embodiment, a storage device includes a control apparatus and a stocker. The control apparatus writes data to or reads data from a storage medium that includes a plurality of non-volatile memory chips. The stocker stores a plurality of the storage media that are detached from the control apparatus. The control apparatus includes a first temperature control system. The first temperature control system raises temperature of the storage medium to a first temperature or higher. The stocker includes a second temperature control system. The second temperature control system cools the storage medium to a second temperature or lower. The second temperature is lower than the first temperature.

Storage device and control method

A memory system includes a nonvolatile memory including a plurality of blocks and a controller configured to write data to a plurality of write destination blocks allocated from the plurality of blocks. The controller is configured to in response to receiving a read command from a host, increment a first counter value corresponding to a first block having a block address allocated to a logical address of read target data specified by the received read command. The controller is configured to read the read target data from the first block or a buffer depending on whether the read target data is readable from the first block, and decrement the first counter value corresponding to the first block. The controller is configured to prohibit processing for transitioning a state of a block associated with an uncompleted read command to a state reusable as a new write destination block.

Memory system and method of controlling nonvolatile memory by controlling the writing of data to and reading of data from a plurality of blocks in the nonvolatile memory

According to one embodiment, a storage system performs a first allocation operation of allocating, for a first namespace, a plurality of first blocks included in the blocks of a nonvolatile memory. The storage system performs a read operation, a write operation or an erase operation on one of the first blocks in response to a command received from a host to read, write or erase the one first block, counts the total number of erase operations performed on the first blocks, and notifies the host of the counted number of erase operations in response to a command received from the host to obtain an erase count associated with the first namespace.

Storage system, information processing system and method for controlling nonvolatile memory

According to one embodiment, when a read request received from a host includes a first identifier indicative of a first region, a memory system obtains a logical address from the received read request, obtains a physical address corresponding to the obtained logical address from a logical-to-physical address translation table which manages mapping between logical addresses and physical addresses of the first region, and reads data from the first region, based on the obtained physical address. When the received read request includes a second identifier indicative of a second region, the memory system obtains physical address information from the read request, and reads data from the second region, based on the obtained physical address information.

According to one embodiment, when a command being executed in a nonvolatile memory is an erase/program command and either a first condition or a second condition is satisfied, a memory system suspends an execution of the erase/program command by transmitting a suspend command to the nonvolatile memory. The first condition is that either the number of read commands included in the first command group or a sum of weights associated with the read commands is equal to or greater than a first value. The second condition is that one or more read commands are included in the first command group and a time elapsed from when an execution of the erase/program command is started or resumed becomes equal to or greater than a second value.

According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller receives a first write request associated with first data from a host. In response to a lapse of first time since the reception of the first write request, the controller starts a write process of second data to the nonvolatile memory. The second data includes at least the first data. The controller transmits a first response to the first write request to the host in response to completion of the write process. The first time is time obtained by subtracting second time from third time designated by the host as a time limit of the transmission of the first response since the reception of the first write request.

Memory system

According to one embodiment, a memory system includes a non-volatile semiconductor memory, a block management unit, and a transcription unit. The semiconductor memory includes a plurality of blocks to which data can be written in both the first mode and the second mode. The block management unit manages a block that stores therein no valid data as a free block. When the number of free blocks managed by the block management unit is smaller than or equal to a predetermined threshold value, the transcription unit selects one or more used blocks that stores therein valid data as transcription source blocks and transcribes valid data stored in the transcription source blocks to free blocks in the second mode.

Memory system with nonvolatile semiconductor memory

Growing community of inventors

Tokyo, Japan

Shinichi Kanno