Fuji Electric Co., Ltd.

Fuji Electric Device Technology Co., Ltd.

Shinichi Jimbo

Tatsuhiko Fujihira

Jun Saito

Naoki Kumagai

Yoshihiro Ikura

Kazuhiko Yoshida

Tomoyuki Yamazaki

Yuuichi Harada

Hong-fei Lu

To provide a semiconductor device that exhibits a high breakdown voltage, excellent thermal properties, a high latch-up withstanding capability and low on-resistance. The semiconductor device according to the invention, which includes a buried insulator regiondisposed between an n-type drift layerand a first n-type regionabove n-type drift layer, facilitates limiting the emitter hole current, preventing latch-up from occurring, raising neither on-resistance nor on-voltage. The semiconductor device according to the invention, which includes a p-type regiondisposed between the buried insulator regionand n-type drift layer, facilitates depleting n-type drift layerin the OFF-state of the device. The semiconductor device according to the invention, which includes a second n-type regiondisposed between the first n-type regionand the n-type drift layer, facilitates dissipating the heat caused in the channel region or in the first n-type regionto a p-type collector layer, which is a semiconductor substrate, via the second n-type region, n-type drift layerand an n-type buffer layer

Semiconductor device and the method of manufacturing the same

A semiconductor device is configured to prevent destruction of elements and/or miss-operation of the circuit by parasitic effects produced by parasitic transistors when a MOSFET of a bridge circuit is formed on a single chip. A Schottky junction is formed by providing an anode electrode in an n well region where a source region, a drain region, and a p well region of a lateral MOSFET. A Schottky barrier diode constituting a majority carrier device is connected in parallel with a PN junction capable of being forward-biased so that the PN junction is not forward-biased so that minority carriers are not generated, and thereby suppressing parasitic effects.

High power semiconductor device having a schottky barrier diode

A high breakdown voltage junction terminating structure having a loop-like RESURF structure formed on a SOI substrate is disclosed. A lateral IGBT, a lateral FWD, an output stage element and a driving circuit are formed in the inside region of the structure. The lateral IGBT and the lateral FWD are surrounded by a trench isolation region as an insulation region. Drain electrodes of high breakdown voltage NMOSFETs are provided on the inside of the high breakdown voltage junction terminating structure. Along with this, a gate electrode and a source electrode of each of the NMOSFETs are provided on the outside of the high breakdown voltage junction terminating structure. The periphery of the high breakdown voltage junction terminating structure is surrounded by a trench isolation region as a second insulation region. A control circuit is provided on the outside of the second insulation region. With this structure, a high breakdown voltage semiconductor device is obtained at low cost, in which power elements, circuits for driving the power elements and logic elements for controlling the power elements are integrated together into the same chip.

High breakdown voltage junction terminating structure

High power semiconductor device having a Schottky barrier diode

A semiconductor device comprising: a semiconductor substrate, a dielectric film formed on the semiconductor substrate, a first electrode and a second electrode separated from each other on the dielectric film; a spiral thin film layer having both ends connected to the first electrode and the second electrode, respectively, the spiral thin film layer surrounding the first electrode, the thin film layer being formed on the dielectric layer, and a plurality of p-n diodes formed in series in the spiral thin film layer along a longitudinal direction of the spiral thin film layer.

Voltage withstanding structure for a semiconductor device

A semiconductor device is provided having a high voltage driver IC reducing malfunction or device destruction. A high voltage IC chip includes a trench structure that surrounds each of two semiconductor regions at different electrical potentials. Specifically, a first semiconductor region forms a ground-potential-based circuit, and a high voltage junction terminating structure around a second semiconductor region forms a floating-potential-based circuit. A trench structure is formed after digging a trench by implanting a high concentration p&plus; region on a trench wall, or alternatively, by filling the trench with a p&plus; doped polysilicon or with a dielectric.

Growing community of inventors

Nagano, Japan

Shinichi Jimbo