Growing community of inventors

Osaka, Japan

Shinichi Domae

Average Co-Inventor Count = 3.60

ph-index = 2

The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.

Forward Citations = 40

Shinichi DomaeYoshiaki Kato (8 patents)Shinichi DomaeHiroshi Masuda (8 patents)Shinichi DomaeKousaku Yano (8 patents)Shinichi DomaeTetsuya Ueda (1 patent)Shinichi DomaeShinichi Domae (9 patents)Yoshiaki KatoYoshiaki Kato (41 patents)Hiroshi MasudaHiroshi Masuda (30 patents)Kousaku YanoKousaku Yano (29 patents)Tetsuya UedaTetsuya Ueda (52 patents)
..
Inventor’s number of patents
..
Strength of working relationships

Company Filing History:

1. Matsushita Electric Industrial Co., Ltd. (4 from 27,375 patents)

2. Panasonic Corporation (3 from 16,453 patents)

3. Matsushita Electronics Corporation (2 from 655 patents)


9 patents:

1. 8110495 - Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation

2. 7911060 - Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation

3. 7642654 - Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor to be used for reliability evaluation

4. 7443031 - Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation

5. 7148572 - Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation

6. 6815338 - Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation

7. 6580176 - Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation

8. 6252427 - CMOS inverter and standard cell using the same

9. 6197685 - Method of producing multilayer wiring device with offset axises of upper and lower plugs

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