Renesas Electronics Corporation

Ulvac, Inc.

Shinichi Chikaki

Takahiro Nakayama

Noriaki Oda

A semiconductor device includes a first interconnect, a porous dielectric layer formed over the first interconnect, a second interconnect buried in the porous dielectric layer and electrically connected to the first interconnect, and a carbon-containing metal film that is disposed between the porous dielectric layer and the second interconnect and isolates these layers.

Semiconductor device and method of manufacturing the same

A semiconductor device includes: a first porous layer that is formed over a substrate and includes a SiOskeleton; a second porous layer that is formed immediately above the first porous layer and includes a SiOskeleton; a via wiring that is provided in the first porous layer; and a trench wiring that is buried in the second porous layer. The first porous layer has a pore density xof 40% or below and the second porous layer has a pore density xof (x+5) % or above.

Semiconductor device and method of manufacturing semiconductor device

The semiconductor device includes a first interconnect layer insulating film, first copper interconnects that are embedded in the first interconnect layer insulating film, and an interlayer insulating film that is formed on the first copper interconnects and the first interconnect layer insulating film. The semiconductor device includes a second interconnect layer insulating film that is formed on the interlayer insulating film and second copper interconnects that are embedded in the second interconnect layer insulating film. The first and second interconnect layer insulating films include first and second low dielectric constant films, respectively. The interlayer insulating film has higher mechanical strength than the first and second interconnect layer insulating films.

Semiconductor device and method for manufacturing the same

In a semiconductor device, a lower multi-layered interconnect structure, an intermediate via-level insulating interlayer, and an upper multi-layered interconnect structure are stacked in this order in a region overlapped with a bonding pad in a plan view; upper interconnects and vias of the upper multi-layered interconnect structure are formed so as to be connected to the bonding pad in the pad placement region; the intermediate via-level insulating interlayer has no electro-conductive material layer, which connect the interconnects or vias in the upper multi-layered interconnect structure with interconnects or vias in the lower multi-layered interconnect structure, formed therein; and the ratio of area occupied by the vias in the via-level insulating interlayers contained in the lower multi-layered interconnect structure is smaller than the ratio of area occupied by the vias in the via-level insulating interlayers contained in the upper multi-layered interconnect structure.

Semiconductor device

A process for manufacturing a hydrophobized microporous film includes: forming an organic silica insulating filmon a substrate; supplying a gaseous mixturecomposed of a silylation gas and an inert gas in an apparatus having the substratedisposed therein at a temperature of the substrate, the substratehaving the organic silica insulating filmformed thereon, and the temperature being equal to or higher than a dew point temperature of the silylation gas and equal to or lower than a vaporizing temperature of the silylation gas; stopping the supply of the gaseous mixtureinto the apparatus; and heating the substrate having the organic silica insulating filmformed thereon, so that a hydrophobizing organic silica insulating film, in which the surface of the organic silica insulating filmand the surfaces of the pores are hydrophobized, can be obtained with reduced increase in the specific dielectric constant.

Growing community of inventors

Ibaraki, Japan

Shinichi Chikaki