Kabushiki Kaisha Toshiba

Shingo Yanagida

Tetsujiro Tsunoda

Makoto Hideshima

Masashi Kuwahara

In a power semiconductor device such as an IGBT, a fifth region of n conductivity type is provided. The fifth region is formed in a portion of a second region (drain region) contacting an insulating layer below the gate layer. The fifth region contacts a third region (base region) and has an impurity concentration higher than that of the second region. Therefore, even when a carrier life time is sufficiently short, an electron distribution density can be kept high in the entire fifth region and the second region under the third region (base region) near the fifth region, and the localization of a hole current is moderated (in a case of a p-type base and an n-type drain). As a result, a maximum controllable current is increased, and a wide safe operation area can be obtained.

Insulated gate bipolar transistor with a shortened carrier lifetime

A high-power semiconductor device comprises a overcurrent detecting terminal. One of conductive layers selectively adhered to a substrate of the semiconductor device is thinner than the other conductive layers. One of terminals for an electrode of the semiconductor element of the high-power semiconductor device is connected to one end of the thinner conductive layer. The overcurrent detecting terminal is electrically connected to said electrode, and to the other end of the thinner conductive layer. A potential difference between the terminal and the overcurrent detecting terminal is measured, in order to detect a current, to prevent an overcurrent from flowing through the semiconductor element.

Growing community of inventors

Yokohama, Japan

Shingo Yanagida