Toyoda Gosei Co., Ltd.

Toyota Gosei Co., Ltd.

Shingo Totani

Masashi Deguchi

Takashi Kawai

Naoki Nakajo

Kosuke Yahata

Misato Boyama

Takahiro Mori

Miki Moriyama

Koichi Goshonoo

Masao Kamiya

Yoshiki Saito

Koji Hirata

Yukitaka Hasegawa

Yuya Ishiguro

Takashi Mizobuchi

Kimiyasu Ide

Naoyuki Okita

Jun Nakauchi

A metal layer is formed by vapor deposition or sputtering on an AlN substrate. Since there are irregularities on the surface of the substrate, irregularities are also formed on the surface of the metal layer. Subsequently, irregularities on the surface of the metal layer are removed and flattened in a mirror state by grinding the surface of the metal layer. Then, a dielectric layer is formed on the metal layer by alternately forming a SiOfilm and a TiOfilm through CVD. Next, an electrode layer is formed in a predetermined pattern by vapor deposition and lift-off on the dielectric layer. Since the surface of the metal layer is flattened in a mirror state, reflectance is high on that surface. As a result, the emission efficiency of the light-emitting device can be improved.

Method for producing light-emitting device

To remove a deteriorated layer generated in forming a scribing trench by laser irradiation. A scribing trench is formed by irradiating a laser beam along a device dividing line on the rear surface of a substrate. At this time, a deteriorated layer is formed on the bottom surface or side surface of the scribing trench. Next, a protective film is formed so as to cover the entire top surface of the device structure, and the deteriorated layer is removed by wet etching. Wet etching is performed by alternately repeating BHF (buffered hydrofluoric acid) wet etching and MEA (monoethanolamine) wet etching several times.

An n-side flattening electrode and a p-side flattening electrode are formed apart from each other on a predetermined region on an insulating film. Recesses are formed according to the level difference due to holes on the surfaces of the n-side flattening electrode and the p-side flattening electrode. Subsequently, the surfaces of the n-side flattening electrode and the p-side flattening electrode are ground until the surfaces become flat. After removal of oxide film, an n-side junction electrode and a p-side junction electrode are formed on the n-side flattening electrode and the p-side flattening electrode, respectively. Since the surfaces of the n-side flattening electrode and the p-side flattening electrode are flattened, the surfaces of the n-side junction electrode and the p-side junction electrode become flat so that the thickness is uniform.

A sacrificial layer is formed on a region for forming the reflective electrode later on the p-type layer, Subsequently, a part of the p-type layer is dry etched to expose an n-type layer. Then, a resist layer having an opening is formed through photolithography on the p-type layer and the n-type layer exposed in the previous step. The opening has a pattern to enclose the sacrificial layer in a plan view. Next, the sacrificial layer is wet etched using a buffered hydrofluoric acid to remove the entire sacrifice layer. Subsequently, a reflective film is formed by sputtering on the p-type layer and the resist layer. Next, the resist layer is removed using a resist stripper, and only the reflective film on the p-type layer is left to form the reflective electrode.

A transparent electrode is formed on a region for forming a reflective electrode later on the p-type layer. Subsequently, a part of the surface of the p-type layer is dry etched to expose the n-type layer. On the p-type layer and the n-type layer exposed in the previous step, a resist layer with an opening is formed through photolithography. The opening has a pattern in which the center of the transparent electrode is exposed and the ends of the opening are covered with the resist layer. Next, the transparent electrode is wet etched. A reflective film is formed on the p-type layer and the resist layer, to remove the resist layer. Thus, only the reflective film on the p-type layer is left to form a reflective electrode. Then, a cover metal layer is continuously formed over the reflective electrode and the transparent electrode.

A planar light source comprises a light guide plate and a light-emitting apparatus disposed on a lateral surface of the light guide plate. The light-emitting apparatus comprises a light-emitting device, a case, and a sealing resin. The light-emitting device has a rectangular shape in a plan view, a long-side lateral surface of a semiconductor layer is reversed tapered having an inclination such that a cross section area increases in a direction parallel to a main surface of a sapphire substrate as a distance from the sapphire substrate increases, and a short-side lateral surface is perpendicular to the main surface of the sapphire substrate. A short-side and a long-side direction of the light-emitting device are perpendicular and parallel to the planar main surface of the light guide plate, respectively. The main surface of the light-emitting device is parallel to the lateral surface of the light guide plate.

Planar light source and method for producing light-emitting device

To provide a light-emitting unit having a semiconductor light-emitting device with a good responsiveness and a sufficient light emission quantity. The light-emitting unit comprises a plurality of semiconductor light-emitting devices, an n-wiring electrode and a p-wiring electrode respectively connecting the semiconductor light-emitting devices in parallel, an n-pad electrode connected to the n-wiring electrode, and a p-pad electrode connected to the p-wiring electrode. At least one of the Group III nitride semiconductor light-emitting devices has a light emission volume of 1 &#x3bc;mto 14 &#x3bc;m.

Light-emitting unit

The present invention provides a light-emitting device suppressing the reduction in the light output while improving the response speed. As shown in FIG., the light-emitting device comprises four square element regions arranged with the sides of the element regions aligned in a two by two lattice. The light-emitting regions are disposed in the vicinity of corners at the center side of the element regions, and the light-emitting regions are localized in the vicinity of the center in the entire element region. A plane pattern of each of the light-emitting regions is formed so that plane patterns of p-electrodes and n-electrodes are not disposed in a region sandwiched by the light-emitting regions.

Light-emitting device

The present invention provides a method for producing a semiconductor light-emitting device in which fine protrusions and recesses are formed on a bottom surface between the protrusions on a surface of a substrate. The method comprises forming a first resist pattern on a nitrogen surface of the substrate, forming a plurality of first protrusions on the nitrogen surface of the substrate, and forming a plurality of second protrusions on the nitrogen surface of the transparent nitride-based substrate. In forming the first protrusions, the plurality of first protrusions and a bottom surface between the first protrusions are formed by dry etching. In forming the second protrusions, the plurality of second protrusions having a height lower than the height of the first protrusions are formed on the bottom surface by wet etching without removing the first resist pattern subjected to dry etching.

Method for producing a semiconductor light-emitting device

The present invention provides a method for producing a semiconductor device exhibiting the improved emission efficiency by reducing a strain between a p-contact layer and a transparent electrode. A transparent electrode made of IZO (Zinc-doped Indium Oxide) was formed on a p-type contact layer by vapor deposition or sputtering. Subsequently, a p-type cladding layer and a p-type contact layer were p-type activated and a transparent electrode was crystallized by indirect resistance heating. This heat treatment was performed under a reduced pressure at a temperature of 700&#xb0; C. Next, microwave heating was performed for three to thirty minutes at a temperature of 100&#xb0; C. to 350&#xb0; C. by microwave irradiation with a frequency of 5.8 GHz in a nitrogen atmosphere. This reduced a strain of the transparent electrode, and improved the conductivity or translucency of the transparent electrode.

Method for producing a semiconductor device

The present invention provides a Group III nitride semiconductor light-emitting device in which the production method is simplified while migration of at least one of Ag atoms and Al atoms is suppressed, and a production method therefor. The production method comprises steps of forming a first electrode, forming a second electrode, and forming a second electrode side barrier metal layer on the second electrode. Moreover, the second electrode has an electrode layer containing at least one of Ag and Al. In forming the first electrode and the second electrode side barrier metal layer, the second electrode side barrier metal layer is formed on the second electrode while the first electrode to be electrically connected to the first semiconductor layer is formed. The first electrode and the second electrode side barrier metal layer are deposited are deposited in the same layered structure.

Group III nitride semiconductor light-emitting device and production method therefor

A face-up-type Group III nitride semiconductor light-emitting device includes a growth substrate, an n-type layer, a light-emitting layer, a p-type layer, an n-electrode including a bonding portion and a wiring portion, a p-electrode including a bonding portion and a wiring portion, and a first insulating film. The n-type layer, the light-emitting layer, and the p-type layer are sequentially stacked on the growth substrate, and the n-electrode and the p-electrode are formed on the first insulating film. A groove having a depth extending from a top surface of the p-type layer to the n-type layer is formed in at least one region selected from a region directly below the wiring portion of the n-electrode and a region directly below the wiring portion of the p-electrode. The wiring portion, which is formed in the groove, is located at a level lower than that of the light-emitting layer.

Group III nitride semiconductor light-emitting device

A group-III nitride compound semiconductor light emitting element includes a substrate that has a main face on which an concave and convex portion is formed, a group-III nitride compound semiconductor layer that is formed on the main face of the substrate, and a clearance that is formed between the substrate and the group-III nitride compound semiconductor layer at a first region of the semiconductor light emitting element. In the first region, a portion of the group-III nitride compound semiconductor layer and a portion of the clearance are disposed in a concave of the concave and convex portion on a section through two adjacent top portions of the concave and convex portion and a bottom portion located between the adjacent top portions.

Group-III nitride compound semiconductor light emitting element, manufacturing method therefor and semiconductor light emitting device

The Group III nitride semiconductor light-emitting device has an insulating multilayer film intervening between a second semiconductor layer and a transparent electrode. The insulating multilayer film serves as a distributed Bragg reflector and is formed in a region including a projection area obtained by projecting a p-electrode to the p-type contact layer. The insulating multilayer film has a first region and a second region, wherein the first region has a layer thickness greater than 95% of the maximum film thickness of the insulating multilayer film, and the second region has a layer thickness not greater than 95% of the maximum film thickness of the insulating multilayer film. The second surface of the insulating multilayer film in the second region has a slope having a dent portion denting toward the first surface of the insulating film.

A method for manufacturing a semiconductor light emitting element comprises steps of forming a semiconductor layer composed of a Group III nitride based compound semiconductor on a principal surface of a substrate; forming a transparent conductive metal oxide film on the semiconductor layer; forming an electrode above the transparent conductive metal oxide film; forming a mask layer for covering a part of the transparent conductive metal oxide film; and heat treating the transparent conductive metal oxide film having the mask layer formed thereon in an oxygen-containing atmosphere; wherein, in the heat treatment step, an oxygen concentration of a remaining part of the transparent conductive metal oxide film which is not covered by the mask layer is made higher than an oxygen concentration of a part of the transparent conductive metal oxide film which is covered by the mask layer.

Growing community of inventors

Kiyosu, Japan

Shingo Totani