Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Shingo Masuko

Takaaki Yasumoto

Naoko Yanase

Akira Yoshioka

Hidetoshi Fujimoto

Yasunobu Saito

Tetsuya Ohno

Ryoichi Ohara

Toshiyuki Naka

Kenya Sano

Yoshiharu Takada

Takao Noda

Takeshi Uchihara

Yorito Kakiuchi

Kazuo Fujimura

Tasuku Ono

Ichiro Mizushima

Kazuhide Abe

Atsuko Iida

Takako Motai

Miki Yumoto

Masaru Furukawa

Yukako Murakami

Yasunari Yagi

According to an embodiment, a semiconductor device includes a silicon substrate, a device layer, and a lower layer. The device layer is formed on an upper surface of the silicon substrate. The lower layer is formed on a lower surface of the silicon substrate and has a side surface connecting to a side surface of the silicon substrate. At least a pair of side surfaces of the semiconductor device has a curved shape widening from an upper side toward a lower side.

Semiconductor device and dicing method

A semiconductor device manufacturing method according to an embodiment including partially forming a first groove on a nitride semiconductor layer provided on a first plane of a substrate having first and second planes by etching so that the substrate is exposed, forming a second groove on the substrate exposed inside the first groove so that a portion of the substrate remains, removing the substrate from the second plane side so that the second groove is not exposed, thinning the substrate, forming a metal film on the second plane side of the substrate, removing the metal film in a portion where the second groove is formed, and forming a third groove on the substrate in the portion where the second groove is formed so that the second groove is exposed from the second plane side.

Semiconductor device manufacturing method

A semiconductor device including: a semiconductor element, a substrate having a first surface on which the semiconductor element is provided, and a second surface located opposite the first surface, a metal species provided on the second surface, and a plated metal portion provided at least in part on the second surface on the metal species. The semiconductor device further includes a first region where the plated metal portion is provided and a second region where the plated metal portion is not provided are alternately arranged at a peripheral portion of the second surface.

Semiconductor device and manufacturing method thereof

A method of forming a semiconductor device including a semiconductor substrate having a first surface and a second surface, and having a gallium nitride-containing layer provided on the first surface of the semiconductor substrate includes grinding, polishing, and etching the second surface of the semiconductor substrate of which a thickness is d1, and reducing the thickness of the semiconductor substrate to one-fifth or less of d1.

Manufacturing method of semiconductor device

A semiconductor device includes a GaN-based semiconductor layer, a source electrode on the GaN-based semiconductor layer, a drain electrode on the GaN-based semiconductor layer, and a gate electrode formed on the GaN-based semiconductor layer between the source electrode and the drain electrode. A first layer is in contact with the GaN-based semiconductor layer between the gate electrode and the drain electrode.

Semiconductor device

In one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type or an intrinsic type. The device further includes a second semiconductor layer of the first conductivity type or the intrinsic type disposed above the first semiconductor layer. The device further includes a third semiconductor layer of a second conductivity type including a first upper portion in contact with the first semiconductor layer, a second upper portion located at a lower position than the first upper portion, a first side portion located between the first upper portion and the second upper portion, and a second side portion located at a lower position than the first side portion.

HEMT semiconductor device

According to one embodiment, a semiconductor device includes a SiC layer of a first conductivity type, a SiC region of a second conductivity type, and a conductive layer of the second conductivity type. The SiC layer of the first conductivity type has a hexagonal crystal structure. The SiC region of the second conductivity type is formed in a surface of the SiC layer. The conductive layer of the second conductivity type is provided on the SiC region and is in contact with a portion of the SiC region including SiC of a cubic crystal structure.

Semiconductor device and method for manufacturing semiconductor device

Growing community of inventors

Kanazawa Ishikawa, Japan

Shingo Masuko