Apple Inc.

Marvell International Limited

Other

Marvellworld Trade Ltd.

Shingo Hatanaka

Hopil Bae

Hung Sheng Lin

Hasan Akyol

Derek Keith Shaeffer

Mahdi Farrokh Baroughi

Henry C Jen

Shafiq M Jamal

Ovidiu Carnu

Chaohao Wang

Kapil Vinod Sakariya

Ion Bita

Sunggu Kang

Sheng Zhang

James E Pedder

Tore Nauta

Xiang Lu

Saif Choudhary

Wei Hsin Yao

Paolo Sacchetto

Kingsuk Brahma

John T Wetherell

Yafei Bi

Jie Won Ryu

Mohammad Bagher Vahid Far

Jesse Aaron Richmond

Xiaoyue Wang

Yunhui Hou

Chih-Wei Yeh

Jaeyoung Kang

Nobutaka Shimamura

Yuichi Okuda

Kenichi Ueno

Yun Yu Wang

Chin-Wei Lin

Ting-Kuo Chang

Chun-Yao Huang

Shinya Ono

Baris Cagdaser

Enkhamgalan Dorjgotov

David W Lum

Masaki Kinoshita

Yingkan Lin

Chengrui Le

Giovanni Carbone

Majid Gharghi

Cheuk Chi Lo

Patrick B Bennett

Chun-Ming Tang

Raman S Thiara

Michael Slootsky

Wenbo Liu

Xuebei Yang

Ashutosh Verma

Adam Adjiwibawa

Mohammad Reza Esmaeili Rad

Lingtao Wang

Chung-Lun Edwin Hsu

Jasdeep Dhaliwal

Runjie Xu

Display panel redundancy schemes and methods of operation are described. In an embodiment, and display panel includes an array of drivers (e.g. microdrivers), each of which including multiple portions to independently receive control and pixel bits. In an embodiment, each driver portion is to control a group of redundant emission elements.

Display panel redundancy schemes

Systems and methods may reduce or eliminate image artifacts due to a defective pixel of an electronic display. An electronic display may include pixels that respectively include a self-emissive element, pixel drive circuitry that supplies a pixel drive current to drive the self-emissive element, and signal routing circuitry that reduces or eliminates a visual artifact due to a defective pixel among the pixels. The signal routing circuitry may do this by turning off the self-emissive element, supplying image data from the pixel drive circuitry to a first adjacent pixel, or receiving image data from other pixel drive circuitry from the first adjacent pixel or a second adjacent pixel.

Pixel screening and repair

An electronic device may include an electronic display panel having multiple display pixels for displaying an image based on analog voltage signals. The electronic device may also include interpolation circuitry to generate the analog voltage signals based on digital image data corresponding to the image. The interpolation circuitry may also receive analog reference voltages and interpolate between sets of the analog reference voltages to generate intermediate voltages, which may be a part of the analog voltage signals. Interpolating between the sets analog reference voltages may include performing a first level interpolation of a first set of the analog reference voltages to generate a first intermediate voltage and performing a second level interpolation of a second set of the analog reference voltages to generate a second intermediate voltage, wherein the first level interpolation is different from the second level interpolation.

Enhanced smoothness digital-to-analog converter interpolation systems and methods

A system may include buffer circuitry that receives an input signal representative of image data for display via a pixel. The buffer circuitry may provide a first driving signal during a first frame of the image data to the pixel based on the input signal. The buffer circuitry may include slew booster circuitry. The slew booster circuitry may supply a voltage boost (e.g., additional voltage) to differential pair stage circuitry of the buffer circuit in response to a difference between the input signal and a second driving signal exceeding a threshold increase a rate of change of the input signal provided. The second driving signal may be provided to the pixel during a second frame of the image data preceding the first frame.

Display circuitry including selectively-activated slew booster

A system includes a pixel that emits light based on a signal provided to the pixel. The system may also include a buffer circuit having a differential pair stage, a cascade stage, and an output stage. The differential pair stage may receive a common mode voltage signal via a first switch in response to the first switch receiving a first signal that causes the first switch to close. The differential pair stage may couple a capacitor to the output stage via a second switch that operate based on a second signal, such that the capacitor reduces an offset provided by one or more circuit components in the differential pair stage, the cascade stage, the output stage, or any combination thereof. The differential pair stage may output the common mode voltage to the pixel via the output stage in response to the first signal being present.

Auto-zero applied buffer for display circuitry

An electronic device includes a display having an active array and a reference array. The active array includes a pixel and the reference array includes a reference pixel. The electronic device also includes processing circuitry communicatively coupled to the display. The processing circuitry is configured to instruct the active array to drive the pixel based at least in part on a set of degradation ratios and gamma tap points for each brightness setting of the display based at least in part on a reconstructed current-voltage curve.

OLED voltage driver with current-voltage compensation

A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.

High frame rate display

A mobile electronic device includes a display having an active array and a reference array. The active array includes a pixel and the reference array includes a reference pixel. The mobile electronic device also includes processing circuitry communicatively coupled to the display. The processing circuitry is configured to instruct the active array to drive the pixel based at least in part on a current-voltage relationship of the pixel and a reference current-voltage relationship of the reference pixel.

An electronic device includes a display having a reference array that includes a first pixel. The display also includes a first emission power supply coupled to the first pixel. The display further includes an active array having a second pixel. The display also includes a second emission power supply coupled to the second pixel.

A display device may include a plurality of pixels that display image data on a display, a digital-to-analog converter that outputs a voltage that corresponds to a luminance value to be depicted on a first pixel, and a circuit that amplifies the voltage and outputs an amplified voltage to the first pixel. The circuit may include a capacitor that receives the voltage via the digital-to-analog converter and an amplifier coupled to the capacitor. The amplifier generates the amplified voltage based on the voltage stored the capacitor. The circuit also include switches that couple a first terminal of the capacitor to an output of the amplifier during a first amount of time and couples a second terminal of the capacitor to the output of the amplifier after the first amount of time expires.

Time-interleaved source driver for display devices

A device includes a resistor string that includes a plurality resistors with voltage taps disposed therebetween. The device may select one particular voltage tap of the plurality of voltage taps based on received gray level data for a pixel of a display. The device also includes a first amplifier that may be coupled to a first terminal end of the resistor string. The device additionally includes a second amplifier that may be coupled to a second terminal end of the resistor string, wherein the plurality of voltage taps may each supply a tap voltage derived from a voltage between the first amplifier and the second amplifier, wherein any tap amplifier of the device coupled to a voltage tap of the plurality of voltage taps provides a reference voltage thereto.

Digital to analog converter

A wired-line transmitter may include architecture that provides control of the current profile during power-up and/or power-down of the transmitter. The current profile may include a sloped ramp up during power-up and/or a sloped ramp down during power-down. The sloped ramps of the current profile mitigate supply bouncing during power-up and/or power-down. Individual enable signals may be derived from an enable signal provided to the transmitter. These individual enable signals may be provided (or turned off) in a time delayed (e.g., staggered) manner to provide the sloped ramps for the current profile.

Mitigation of power supply disturbance for wired-line transmitters

Growing community of inventors

San Jose, CA, United States of America

Shingo Hatanaka