Advanced Semiconductor Engineering, Inc.

Advanced Semiconductor Engineering, Inc. Kaohsiung, Taiwan

Shin-Luh Tarng

Meng-Kai Shih

Tang-Yuan Chen

Chih-Pin Hung

Teck-Chong Lee

Ian Hu

Jin-Yuan Lai

Tse-Chuan Chou

Hung-Hsien Huang

Ying-Xu Lu

Chao-Fu Weng

Hsin-En Chen

Ying-Ta Chiu

Chun Hung Tsai

Hsuan Yu Chen

Yong-Da Chiu

Shang-Kun Huang

Jui-Cheng Yu

Po-Cheng Huang

Chien-Neng Liao

Shiu-Chih Wang

A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.

Semiconductor device packages and methods of manufacturing the same

A heat transfer element, a method for manufacturing the same and a semiconductor structure including the same are provided. The heat transfer element includes a housing, a chamber, a dendritic layer and a working fluid. The chamber is defined by the housing. The dendritic layer is disposed on an inner surface of the housing. The working fluid is located within the chamber.

Heat transfer element, method for forming the same and semiconductor structure comprising the same

A substrate, a semiconductor package device and a method of manufacturing a semiconductor device package are provided. The substrate includes a low density wiring structure, a first middle density wiring structure and high density wiring structure. The first middle density wiring structure is electrically connected to the low density wiring structure. The high density wiring structure is electrically connected to the low density wiring structure. The high density wiring structure and the first middle density wiring structure are disposed side by side. A line space of a circuit layer of the low density wiring structure is greater than a line space of a circuit layer of the first middle density wiring structure. The line space of the circuit layer of the first middle density wiring structure is greater than a line space of a circuit layer of the high density wiring structure.

Substrate and semiconductor device package and method for manufacturing the same

A semiconductor device package includes a semiconductor die and an anisotropic thermal conductive structure. The semiconductor die includes a first surface, a second surface opposite to the first surface and edges connecting the first surface to the second surface. The anisotropic thermal conductive structure has different thermal conductivities in different directions. The anisotropic thermal conductive structure includes at least two pairs of film stacks, and each pair of the film stacks comprises a metal film and a nano-structural film alternately stacked. The anisotropic thermal conductive structure comprises a first thermal conductive section disposed on the first surface of the semiconductor die, and the first thermal conductive section is wider than the semiconductor die.

Semiconductor device package

The present disclosure relates to a semiconductor device package including a substrate, a semiconductor device and an underfill. The substrate has a first surface and a second surface angled with respect to the first surface. The semiconductor device is mounted on the first surface of the substrate and has a first surface facing the first surface of the substrate and a second surface angled with respect to the first surface of the substrate. The underfill is disposed between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate is located in the substrate and external to a vertical projection of the semiconductor device on the first surface of the substrate. A distance between the second surface of the substrate and an extension of the second surface of the semiconductor device on the first surface of the substrate is less than or equal to twice a distance between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate extends along at least three sides of the semiconductor device.

Semiconductor device package having continously formed tapered protrusions

A semiconductor package includes an electrical connection structure. The electrical connection structure includes: a first conductive layer; a second conductive layer on the first conductive layer; and a conductive cap between the first conductive layer and the second conductive layer, the conductive cap having a hardness greater than a hardness of the first conductive layer.

Semiconductor packages

An apparatus includes: a first image capture module, a second image capture module, and a first projector. The first image capture module has a first optical axis forming an angle from approximately 70&#xb0; to approximately 87&#xb0; with respect to the surface of a carrier. The second image capture module has a first optical axis forming an angle of approximately 90&#xb0; with respect to the surface of the carrier. The first projector has a first optical axis forming an angle from approximately 40&#xb0; to approximately 85&#xb0; with respect to the surface of the carrier.

Apparatus and method for measuring warpage

An electro-thinning apparatus for removing excess metal from the surface metal layer of the substrate is provided. The apparatus includes an electrolysis bath, a transportation system, an anode roller, a cathode roller, and at least one shielding plate. The electrolysis bath contains an electrolysis liquid. The transportation system is disposed in the electrolysis bath for moving a substrate from an upstream end to a downstream end. The anode roller is disposed relative to the electrolysis bath and located upstream to the transportation system. The cathode roller is located above the transportation system and located downstream to the anode roller. The at least one shielding plate is located downstream to the cathode roller. During electrolysis, the anode roller contacts a surface metal layer of the substrate while the cathode roller is partly immersed in the electrolysis liquid and away from the surface metal layer of the substrate during electrolysis.

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Kaohsiung, Taiwan

Shin-Luh Tarng