Sharp Kabushiki Kaisha Corporation

Shin-ichi Sato

Yukiharu Akiyama

Kenji Hakozaki

According to the present invention, a method for producing a nonvolatile semiconductor memory device is provided. The method includes the steps of: forming stripe-shaped silicon portions including a plurality of first portions to be used as a plurality of floating gates and a plurality of second portions interposed between two adjacent portions of the plurality of first portions by patterning a silicon film; forming a conductive film so as to cover an insulating film; forming a control gate so as to cover the plurality of first portions of the stripe-shaped silicon portions by patterning the conductive film; converting the plurality of second portions of the stripe-shaped silicon portions into a silicon oxide film, and forming the plurality of floating gates from the plurality of first portions by thermally oxidizing the plurality of second portions; and implanting impurity ions through the silicon oxide film into the active region on the semiconductor substrate by using the control gate as a mask, thereby forming a source region and a drain region in the active region.

Method for producing a floating gate memory device including implanting

An Electrically Erasable PROM (E.sup.2 PROM) according to the present invention includes a semiconductor substrate of a first conductivity type having a field oxide formed on a predetermined region of the main surface thereof; a memory section formed on the semiconductor substrate; and a peripheral circuit section formed in the peripheral of the memory section, wherein the peripheral circuit section has a CMOS structure in which an N-channel MOS transistor and a P-channel MOS transistor are connected to each other in a complementary manner; one of the N-channel MOS transistor and the P-channel MOS transistor is a thin film transistor formed on the field oxide and the other is a MOS transistor formed on the semiconductor substrate; and the memory section includes a plurality of non-volatile transistors formed on the semiconductor substrate.

Electrically erasable PROM (E.sup.2 PROM) with thin film peripheral

A method for fabricating a semiconductor device including a contact window formed in an interlevel insulator so as to connect electrodes to an interconnection and to connect impurity diffusion regions to the interconnection is provided. After forming an insulating film whose thickness on a contact region of at least one of the plurality of electrodes, which is to be electrically connected to the interconnection, is smaller than that on at least another one of the plurality of electrodes, which is not to be electrically connected to the interconnection. The interlevel insulator formed on part of the plurality of impurity diffusion regions is etched until a surface of the semiconductor substrate is exposed, and the interlevel insulator on the contact region of at least one of the plurality of electrodes is etched until a surface of the electrode is exposed.

Growing community of inventors

Nara, Japan

Shin-ichi Sato