United Microelectronics Corp.

Shim F Tzou

Water Lur

Jiunn Y Wu

A first thin silicon oxide layer is formed the surface of a silicon substrate. A silicon nitride layer is deposited overlying said first thin silicon oxide layer. Portions of the silicon nitride layer and the first thin silicon oxide layer not covered by a mask pattern are etched through to the silicon substrate to provide a plurality of wide and narrow openings exposing portions of the silicon substrate that will form the device isolation regions. A layer of aluminum is deposited overlying the patterned nitride and first thin silicon oxide layers. A first layer of silicon oxide is deposited overlying the aluminum layer. The substrate is annealed whereby the aluminum layer reacts with the exposed portions of the silicon substrate within the openings to form an aluminum-silicon alloy wherein the alloy forms trenches into the surface of said substrate. The silicon oxide layer and the aluminum and aluminum-silicon alloy layers are removed leaving trenches in the substrate where device isolation regions are to be formed. A second thin layer of silicon oxide is grown over the surfaces of the nitride layer and conformally within the trenches. Channel-stops are selectively ion implanted through the openings into the substrate underneath the trenches. There are many methods to fill in the trenches such as photoresist etchback, BPSG reflow, chemical mechanical polishing, spin-on-glass planarization, etc., to complete the device isolation of the integrated circuit.

Growing community of inventors

Chu-Tung, Taiwan

Shim F Tzou