Cisco Technology, Inc.

ShiJie Wen

Jie Xue

Richard J Wong

James Edwin Turman

Dao-I Tony Lin

Anthony Winston

John Christian Holst

Andy Yu

Pierre Chor-Fung Chia

Zoe Frances Conroy

An approach is presented herein to use an in-situ algorithmic decision methodology during each stage of testing before 2C/4C to decide how long to test, how much margin should be used for each device under the test (DUT) to shorten or eliminate 2C/4C testing. Each DUT will be tested differently based on the risk level or the likelihood of failure at 2C/4C. To be able to achieve this, low-level hardware (HW) based sensors (on the printed circuit board assembly (PCBA), in power module, in silicon components, in silicon component complex, etc.) are used to collect telemetry data with a high frequency data acquisition rate during the testing. As testing is ongoing for each DUT, a margin distribution and algorithm modeling is performed in-situ.

Telemetry-based model driven manufacturing test methodology

A method, computer system, and computer program product are provided for stress-testing electronics using telemetry modeling. Telemetry data is received from one or more devices under test during a hardware testing phase, the telemetry data including one or more telemetry parameters. The telemetry data is processed using a predictive model to determine future values for the one or more telemetry parameters. Additional hardware testing is performed, wherein the additional hardware testing includes adjusting one or more testing components based on the determined future values.

Stress-testing electrical components using telemetry modeling

Masks that selectively attenuate radiation for inspections of printed circuit boards (PCB) are disclosed. A PCB may be inspected for defects by exposing the PCB with radiation and analyzing the radiation transmitted through the PCB. By employing a radiation mask having first and second segments between the PCB and a radiation source, the radiation may be selectively attenuated to attenuate a first portion of the radiation with a first attenuation level to prevent performance degradation to sensitive semiconductor devices as part of a first sectional area of the PCB, and yet provide substantially non-attenuation or attenuation at a second attenuation level for a second portion of the radiation incident upon a second sectional area of the PCB which is free from sensitive semiconductor devices. In this manner, the selective attenuation enables inspection of the first and second sectional areas of the PCB without damage to the sensitive semiconductor devices.

Masks that selectively attentuate radiation for inspection of printed circuit boards

Techniques are provided for classifying and correcting errors in a bit sequence. At a memory control device, access is requested to a first bit sequences that is stored in a bit sequence database of a memory component and associated with an address. An error is detected in the first bit sequence, and the address associated with the bit sequence is compared to addresses stored in an address database of a content addressable memory component to determine if there is a match. When there is a match, the error is classified as a hard bit error. When there is not a match, the error is classified as a soft bit error.

Techniques for embedded memory self repair

A latch device and related layout techniques are provided to reduce soft error rates caused by radiation or other exposure to ionized/charged particles. The latch device comprises a pair of cross-coupled inverters forming a storage cell. A pair of clock pass transistors is coupled to the pair of cross-coupled inverters. The pair of clock pass transistors is configured to receive as input a clock signal. On both true and complement sides of the latch device, a channel-connected region is formed between one of the pair of cross-coupled inverters and one of the pair of clock pass transistors. Each channel-connected region is configured to have a reduced Linear Energy Transfer (LET) cross-section. The reduced LET cross-section results in a reduced soft error rate.

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Sunnyvale, CA, United States of America

ShiJie Wen