Intel Corporation

Shihao Ji

Gautham N Chinya

Arnab Paul

Victor W Lee

Daehyun Kim

Naveen K Mellempudi

Sheng C Li

Dhiraj D Kalamkar

Yuxin Bai

Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.

Multiplication-free approximation for neural networks and sparse coding

In an embodiment, a processor a plurality of cores to independently execute instructions, the cores including a plurality of counters to store performance information, and a power controller coupled to the plurality of cores, the power controller having a logic to receive performance information from at least some of the plurality of counters, determine a number of cores to be active and a performance state for the number of cores for a next operation interval, based at least in part on the performance information and model information, and cause the number of cores to be active during the next operation interval, the performance information associated with execution of a workload on one or more of the plurality of cores. Other embodiments are described and claimed.

Performing power management in a multicore processor

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Portland, OR, United States of America

Shihao Ji