Taiwan Semiconductor Manufacturing Comp. Ltd.

Hon Hai Precision Industry Co., Ltd.

Compal Electronics, Inc.

Tatung Company

Nanning Fugui Precision Industrial Co., Ltd.

Tatung University

Shih-Wei Lin

Lee-Chuan Tseng

Chun-Ren Cheng

Yi-Hsien Chang

Ting-Jung Chen

Yi-Chen Chen

Chia-Shiung Tsai

Shih-Chang Liu

Ming Chyi Liu

Ping-Yin Liu

Yuan-Chih Hsieh

Lan-Lin Chao

Chung-Yen Chou

Chih-Jen Chan

Che-Ming Chang

Chang-Ming Wu

Xin-Hua Huang

Wei-Cheng Shen

Chun-Wen Cheng

Yi-Shao Liu

Yuan-Tai Tseng

Yi-Chuan Teng

Chen-Hao Chiang

Jung-Kuo Tu

Eugene I-Chun Chen

Cheng-Yu Hsieh

Tzu-Heng Wu

Jung-Huei Peng

Yung-Chang Chang

Feng-Jia Shiu

Jieh-Jang Chen

Te-Hsien Hsieh

The-Nan Chang

Hung Chang Hsieh

Jiunn-Her Li

Tzu-Hsiu Hung

Jung-I Lin

Chun-wen Cheng

Jen-Hao Liu

Yi-chuan Teng

Hsing-Hsu Chen

Chia-Hung Hung

Shun-Wei Lan

Hsiang Chang

Hsiang-Wei Chen

Cheng-yu Hsieh

The present disclosure provides a semiconductor structure and a method for fabricating semiconductor structure. The semiconductor structure includes a first device, configured to be a complementary metal oxide semiconductor device, wherein the first device includes a substrate, a multi-layer structure disposed on the substrate, a first hole, defined between a first end with a first circumference and a second end with a second circumference, a second hole, aligned to the first hole and defined between the second end and a third end with a third circumference, wherein the third circumference is larger than the first circumference and the second circumference, and a second device, configured to be a micro-electro mechanical system device and bonded to the first device, wherein a first chamber is between the first device and the second device, and the first end links with the first chamber, and a sealing object configured to seal the second hole.

Semiconductor device and method for fabricating the same

A semiconductor device is provided. The semiconductor device includes a waveguide over a substrate. The semiconductor device includes a first dielectric structure over the substrate, wherein a portion of the waveguide is in the first dielectric structure. The semiconductor device includes a second dielectric structure under the waveguide, wherein a first sidewall of the second dielectric structure is adjacent a first sidewall of the substrate.

Semiconductor device and method of making

In some embodiments, the present disclosure relates to a process tool that includes a chamber housing defined by a processing chamber, and a wafer chuck structure arranged within the processing chamber. The wafer chuck structure is configured to hold a wafer during a fabrication process. The wafer chuck includes a lower portion and an upper portion arranged over the lower portion. The lower portion includes trenches extending from a topmost surface towards a bottommost surface of the lower portion. The upper portion includes openings that are holes, extend completely through the upper portion, and directly overlie the trenches of the lower portion. Multiple of the openings directly overlie each trench. Further, cooling gas piping is coupled to the trenches of the lower portion of the wafer chuck structure, and a cooling gas source is coupled to the cooling gas piping.

Wafer chuck structure with holes in upper surface to improve temperature uniformity

Structures and methods including a waveguide having a cladding layer surrounding a core layer disposed over a substrate, a cavity extending into the substrate adjacent the waveguide, a fiber disposed in the cavity, and an isolation space extending into the substrate and disposed under the waveguide. A plurality of holes may extend through the cladding layer adjacent the core layer.

Source/drain feature separation structure

The present disclosure relates to an image sensor integrated chip. The image sensor integrated chip includes a photodiode region disposed within a substrate having a first semiconductor material region. A second semiconductor material region is disposed onto the substrate. A patterned doped layer is arranged between the substrate and the second semiconductor material region. The second semiconductor material region includes a sidewall connecting to a bottom surface of the second semiconductor material region. The sidewall extends through the patterned doped layer. A bottom surface of the second semiconductor material region is directly over the photodiode region.

Channel pattern design to improve carrier transfer efficiency

Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device includes a first doped region having a first doping type disposed in a semiconductor substrate. A second doped region having a second doping type different than the first doping type is disposed in the semiconductor substrate and laterally spaced from the first doped region. A waveguide structure is disposed in the semiconductor substrate and laterally between the first doped region and the second doped region. A photodetector is disposed at least partially in the semiconductor substrate and laterally between the first doped region and the second doped region. The waveguide structure is configured to guide one or more photons into the photodetector. The photodetector has an upper surface that continuously arcs between opposite sidewalls of the photodetector. The photodetector has a lower surface that continuously arcs between the opposite sidewalls of the photodetector.

Semiconductor device comprising a photodetector with reduced dark current

The present disclosure provides a method of manufacturing a MEMS device. In some embodiments, a first interlayer dielectric layer is formed over a substrate, and a diaphragm is formed over the first interlayer dielectric layer. Then, a second interlayer dielectric layer is formed over the diaphragm. A first etch is performed to form an opening through the second interlayer dielectric layer and the diaphragm and reaching into an upper portion of the first interlayer dielectric layer. A second etch is performed to the first interlayer dielectric layer and the second interlayer dielectric layer to form recesses above and below the diaphragm and to respectively expose a portion of a top surface and a portion of a bottom surface of the diaphragm. A sidewall stopper is formed along a sidewall of the diaphragm into the recesses of the first interlayer dielectric layer and the second interlayer dielectric layer.

Method of manufacturing a microelectromechanical systems (MEMS) device

A semiconductor oxide plate is formed on a recessed surface in a semiconductor matrix material layer. Comb structures are formed in the semiconductor matrix material layer. The comb structures include a pair of inner comb structures spaced apart by a first semiconductor portion. A second semiconductor portion that laterally surrounds the first semiconductor portion is removed selective to the comb structures using an isotropic etch process. The first semiconductor portion is protected from an etchant of the isotropic etch process by the semiconductor oxide plate, the pair of inner comb structures, and a patterned etch mask layer that covers the comb structures. A movable structure for a MEMS device is formed, which includes a combination of the first portion of the semiconductor matrix material layer and the pair of inner comb structures.

Micro-electromechanical system device including a precision proof mass element and methods for forming the same

Structure including waveguide and isolation space

Various embodiments of the present disclosure are directed towards an integrated chip including a waveguide and a heater structure. The waveguide is disposed on a substrate and comprises an active region that extends continuously along a first distance. The heater structure overlies the waveguide. The heater structure comprises a conductive structure over the active region and a vertical structure disposed between the conductive structure and the substrate. The vertical structure comprises a conductive upper vertical segment and a lower vertical segment. The conductive structure and the conductive upper vertical segment continuously laterally extend across a second distance that is greater than or equal to the first distance. The first distance is greater than a width of the conductive structure.

Heater structure configured to improve thermal efficiency in a modulator device

In accordance with some embodiments, a method of forming an auto-focusing device is provided. The method includes forming a cantilever beam member. The cantilever beam member has a ring shape. The method further includes forming a piezoelectric member over the cantilever beam member. The method also includes forming a membrane over the cantilever beam member. The membrane has a first region and a second region. The first region has a planar surface, and the second region is located between the first region and an inner edge of the cantilever beam member and has a plurality of corrugation structures. In addition, the method includes applying a liquid optical medium over the membrane and sealing the liquid optical medium with a protection layer.

Auto-focusing device and method of fabricating the same

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Taipei, Taiwan

Shih-Wei Lin