Delta Electronics, Inc.

National Central University

Delta Electroncs, Inc.

Shih-Peng Chen

Ching-Chuan Shiue

Li-Fan Lin

Wen-Chia Liao

Huang-Kun Chen

Chun-Chieh Yang

Chao-Min Chen

Horng-Jou Wang

Chii-Chang Chen

Cheng-Yi Liu

Hsueh-Kuo Liao

Chuan-Chia Cheng

Chia-Hua Chan

Ching-Liang Lin

Jen-Inn Chyi

Geng-Yen Lee

Hui-Ling Lin

A semiconductor device including an active layer made of III-V group semiconductors, a source electrode and a drain electrode disposed on the active layer, a gate electrode disposed on or above the active layer and between the source electrode and the drain electrode, an interlayer dielectric covering the source electrode, the drain electrode, and the gate electrode and having a plurality of inter-gate via holes. The semiconductor device further includes an inter-source layer, an inter-drain layer, and an inter-gate layer disposed on the interlayer dielectric. The semiconductor device further includes an inter-gate plug filled in the inter-gate via hole and electrically connected to the gate electrode and the inter-gate layer, and a gate field plate being separated from the gate electrode and electrically connected to the gate electrode through the inter-gate layer.

Heterojunction semiconductor device for reducing parasitic capacitance

A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, an interlayer dielectric, an inter-source layer, an inter-source plug, an inter-drain layer, an inter-drain plug, an inter-gate layer, and an inter-gate plug. The active layer is made of III-V group semiconductors. The source electrode, the drain electrode, and the gate electrode are disposed on the active layer. The gate electrode is disposed between the source electrode and the drain electrode. The interlayer dielectric covers the source electrode, the drain electrode, and the gate electrode. The inter-source layer, the inter-drain layer, and the inter-gate layer are disposed on the interlayer dielectric. The inter-source plug is electrically connected to the source electrode and the inter-source layer. The inter-drain plug is electrically connected to the drain electrode and the inter-drain layer. The inter-gate plug is electrically connected to the gate electrode and the inter-gate layer.

A semiconductor device includes an active layer, source electrodes, drain electrodes, gate electrodes, a first dielectric layer, source trace, first source vias, a second dielectric layer, a source pad, and second source vias. The first dielectric layer covers the source electrodes, the drain electrodes, and the gate electrodes. The source traces are disposed on the first dielectric layer, are electrically connected to the source electrodes, and are covered by the second dielectric layer. The source pad is disposed on the second dielectric layer, and includes a first source trunk, a first source branch, and a source sub-branch. The first source branch is protruded from the first source trunk and is electrically connected to one of the drain traces through the second source vias. The source sub-branch is protruded from the first source branch and is electrically connected one of the source electrodes through the third source vias.

Semiconductor device

A light emitting semiconductor element includes at least two electrically conductive units, at least a light emitting semiconductor die and a light transmitting layer. A groove is located between the two electrically conductive units. The light emitting semiconductor die is cross over the electrically conductive units. The light transmitting layer covers the light emitting semiconductor and partially fills within the groove for linking the electrically conductive units.

Light emitting semiconductor

An illumination apparatus includes a first light-emitting device, a second light-emitting device, and a third light-emitting device. The light emitted from the third light-emitting device is selectively mixed with the light emitted from the first light-emitting device or the second light-emitting device to form a white light having a chromaticity coordinate point substantially located on a Black Body Locus. A color of the light emitted from the third light-emitting device is determined by linear relationships between chromaticity coordinate points corresponding to wavelengths of the lights emitted form the first light-emitting device and the second light-emitting device and corresponding to a color temperature of the white light. A method for generating a white light is also disclosed herein.

Illumination apparatus and method for generating white light

A light emitting element including an epitaxy layer, at least one first electrode, at least one second electrode, a first bonding pad and a second bonding pad. The epitaxy layer includes in sequence a first semiconductor layer, an active layer and a second semiconductor layer, and the first semiconductor layer has an exposed portion exposed from the second semiconductor layer and the active layer. The first electrode is disposed at the exposed portion. The second electrode is disposed at the second semiconductor layer. The first bonding pad is connected with the first electrode. The second bonding pad is connected with the second electrode. Two light emitting elements with different structures and the light emitting module utilizing the light emitting elements mentioned above are also disclosed.

Light emitting element and light emitting module thereof

A field effect transistor device is provided by the invention. The field effect transistor device includes: a substrate; a buffer layer, a channel layer, and a first barrier layer sequentially disposed on the substrate; a two-dimensional electron gas controlling layer disposed on the first barrier layer; a second barrier layer disposed on the two-dimensional electron gas controlling layer, wherein the second barrier layer has a recess passing through the second barrier layer; and a gate electrode filled into the recess and separated from the second barrier layer and the two-dimensional electron gas controlling layer by an insulating layer.

Field effect transistor device

Light emitting semiconductor element and method of manufacturing the same

A light-emitting diode (LED) apparatus includes a thermoconductive substrate, a thermoconductive adhesive layer, an epitaxial layer, a current spreading layer and a micro- or nano-roughing structure. The thermoconductive adhesive layer is disposed on the thermoconductive substrate. The epitaxial layer is disposed opposite to the thermoconductive adhesive layer and has a first semiconductor layer, an active layer and a second semiconductor layer. The current spreading layer is disposed between the second semiconductor layer of the epitaxial layer and the thermoconductive adhesive layer. The micro- or nano-roughing structure is disposed on the first semiconductor layer of the epitaxial layer. In addition, a manufacturing method of the LED apparatus is also disclosed.

Light-emitting diode apparatus and manufacturing method thereof

A light emitting diode (LED) device includes a stacked epitaxial structure, a heat-conductive plate and a seed layer. The stacked epitaxial structure sequentially includes a first semiconductor layer (N&#x2014;GaN), a light emitting layer, and a second semiconductor layer (P&#x2014;GaN). The heat-conductive plate is disposed on the first semiconductor layer, and the seed layer is disposed between the first semiconductor layer and the heat-conductive plate. Also, the present invention discloses a manufacturing method thereof including the steps of: forming at least one temporary substrate, which is made by a curable polymer material, on an LED device, and forming at least a heat-conductive plate on the LED device.

Light emitting diode devices and manufacturing method thereof

A light-emitting diode (LED) apparatus includes an epitaxial multilayer, a micro/nano rugged layer and an anti-reflection layer. The epitaxial multilayer has a first semiconductor layer, an active layer and a second semiconductor layer in sequence. The micro/nano rugged layer is disposed on the first semiconductor layer of the epitaxial multilayer. The anti-reflection layer is disposed on the micro/nano rugged layer. In addition, a manufacturing method of the LED apparatus is also disclosed.

An electroluminescent device includes a conduction substrate, a reflection layer, a patterned transparent conduction layer, at least one light emitting diode (LED) element, a first contact electrode and a second contact electrode. The reflection layer is disposed on the conduction substrate, and the patterned transparent conduction layer is formed on the reflection layer. The LED element is formed on the patterned transparent conduction layer, and the LED element includes a first semiconductor layer, a light emitting layer and a second semiconductor layer in sequence. The second semiconductor layer is disposed on the patterned transparent conduction layer and the reflection layer. The first contact electrode is disposed at one side of the first semiconductor layer, and the second contact electrode is disposed at one side of the conduction substrate.

Growing community of inventors

Taoyuan Hsien, Taiwan

Shih-Peng Chen