Asmedia Technology Inc.

Via Technologies, Inc.

Shih-Min Lin

Chin-Fa Hsiao

Te-Ming Kung

Yi-Chung Tsai

A testing circuit for testing a universal serial bus (USB) of an electronic device includes a controller, a first switch, a pull-down resistor, a gating pull-up resistor, and a second switch. The controller provides a control signal according to a power receiving condition of the electronic device. A control terminal of the first switch is coupled to the controller. The pull-down resistor is coupled between a configuration channel pin of the USB and a first terminal of the first switch. The gating pull-up resistor is coupled between the configuration channel pin and the control terminal of the first switch. A control terminal of the second switch is coupled to the controller. A first terminal of the second switch is coupled to a second terminal of the first switch and a ground pin of the USB. A second terminal of the second switch is coupled to a reference low voltage.

Testing circuit for testing universal serial bus

A high-definition multimedia interface (HDMI) data transceiving apparatus is disclosed. The HDMI data transceiving apparatus includes a data receiver and a data transmitter. The data transmitter includes a first impedance-providing device and a second impedance-providing device. The data transmitter has a first data transmission terminal and a second data transmission terminal. The first data transmission terminal and the second data transmission terminal are coupled to the data receiver through a first transmission line and a second transmission line, respectively. The data transmitter respectively transmits first data and second data to the data receiver. The first impedance-providing device and the second impedance-providing device absorb a reflected wave generated by the HDMI data transceiving apparatus when the first data and the second data are transmitted.

High-definition multimedia interface data transceiving apparatus

A receiver includes a CDR circuit, serial-to-parallel converter, and test module. The CDR circuit is for receiving the test signal groups inputted in series and following transmitting frequency of the test signal groups to obtain a clock signal, wherein the clock signal is used to provide an operational frequency of the receiver. The serial-to-parallel converter is for receiving the test signal groups outputted by the CDR circuit and converting the serially-inputted test signal groups into a plurality of test bytes outputted in parallel, wherein each of the test bytes has multi-bit of data. The test module is for receiving the test bytes and the clock signal and comparing two adjacent bytes of the test bytes to determine whether the two adjacent test bytes are completely the same.

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Taipei, Taiwan

Shih-Min Lin