Taiwan Semiconductor Manufacturing Comp. Ltd.

Shih-Hung Lan

Chewn-Pu Jou

Fu-Lung Hsueh

Ruey-Bin Sheen

Wei-Li Chen

Kuang-Kai Yen

Yung-Hsu Chuang

Tsung-Hsiung Lee

Fan-ming Kuo

Shi-Hung Wang

Huan-Neng Chen

Chih-Hsien Chang

Hsieh-Hung Hsieh

Tien-Chien Huang

Ying-Yu Hsu

Yi-Hsuan Liu

Systems and methods are disclosed for aligning multiple data bits by adjusting the timing of input lines for those data bits. Embodiments include a hierarchical structure for comparing the timing of multiple sets of bits. Other embodiments include aligning data bits from multiple chips in a 3D die stacking architecture.

System and method for aligning data bits

The present disclosure relates to a device and method to reduce the dynamic/static power consumption of an MCML logic device. In order to retain register contents during power off mode, an MCML retention latch and flip-flop are disclosed. Retention Latch circuits in MCML architecture are used to retain critical register contents during power off mode, wherein combination logic including clock buffers on the clock tree paths are powered off to reduce dynamic/static power consumption. The MCML retention flip-flop comprises a master latch and a slave latch, wherein a power switch is added to the master latch to power the master latch off during power off mode. The slave latch includes pull-down circuits that remain active to enable the slave latch to retain data at a proper voltage level during power off mode. Other devices and methods are also disclosed.

MCML retention flip-flop/latch for low power applications

A semiconductor wafer includes a plurality of dies. Each of the plurality of dies includes a radio frequency identification (RFID) tag circuit and a coil. The RFID tag circuit includes a tag core, an RF front-end circuit, an ID decoder, a comparator and conductive line for a unique ID. The RF front-end circuit is configured to receive electromagnetic signals through the coil in each of the plurality of dies and to convert the received electromagnetic signals into commands. The ID decoder is configured to receive the commands and to generate an expect ID. The comparator is configured to compare the unique ID with the expect ID to generate a comparison result. The comparison result is arranged to decide if the tag core is configured to receive commands.

Method and apparatus of RFID tag contactless testing

A strobe calibration component for a memory control device includes a tri-state detection receiver, an edge detection component, and an extension gate generation component. The tri-state detection receiver is configured to identify states of an input signal. One of the states includes a high impedance state. The edge detection component is configured to identify valid edges from a sequence of states provided from the tri-state detection receiver. The extension gate generation component is configured to generate a calibrated gate signal according to the valid edges from the edge detection component.

Systems and methods for data strobe calibration for timing variations

Growing community of inventors

Jhubei, Taiwan

Shih-Hung Lan