Solid State Storage Technology Corporation

System General Corporation

Shih-Hung Hsieh

Ta-Yung Yang

I-Hsiang Chiu

Tien-Chi Lin

Chou-Sheng Wang

Ying-Chieh Su

Chen-Hui Chan

Shi-Xuan Chen

Sung-Hung Wu

Hsuan-Yi Chiang

Tzu-Chieh Lin

Yu-Cheng Kao

A data management method for a solid state storage device is provided. The solid state storage device can selectively perform a TACW operation. While the TACW operation is performed, the controlling circuit determines a specified time interval corresponding to the largest amount of write data. Moreover, a portion of the write data stored in the specific time interval will be moved to another location of the non-volatile memory. When the solid state storage device performs the data remediation process according to the data retention time, the time period of performing the data remediation process is largely shortened. Consequently, the performance of the solid state storage device can be enhanced.

Data management method for solid state storage device

A control method for a solid state drive is provided. The solid state drive includes a non-volatile memory with plural blocks. In a step (a1), a block is opened. In a step (a2), a program action is performed to store a valid write data into the open block. Then, a step (a3) is performed to judge whether an amount of the valid write data in the open block reaches a predetermined capacity. In a step (a4), if the amount of the valid write data in the open block does not reach the predetermined capacity, the step (a2) is performed again. In a step (a5), if the amount of the valid write data in the open block reaches the predetermined capacity, the open block is closed and the step (a1) is performed again. The predetermined capacity is lower than a capacity of one block.

Control method for solid state drive

A data processing method for a computer system is provided. The computer system includes a host and an open-channel solid state drive. The open-channel solid state drive is connected with the host. The data processing method includes the following steps. Firstly, plural block characteristic parameters of a specified block in a non-volatile memory of the open-channel solid state drive are collected. Then, the plural block characteristic parameters are inputted into a prediction function, so that a prediction value is acquired. If the prediction value exceeds a threshold value, a data in the specified block of the non-volatile memory is moved to a blank block of the non-volatile memory by the host.

Data processing method for computer system with solid state drive

A solid state drive with a reset circuit includes a controlling circuit, a flash array and a buffer. The controlling circuit includes a physical layer circuit and a first input/output port. The first input/output port is connected with a first reset terminal of a host. The flash array and the buffer are connected with the controlling circuit. When the first reset terminal of the host activates a reset signal, a voltage level of the first input/output port is changed. After a delay time, the voltage level of a second reset terminal of the physical layer circuit is changed and the physical layer circuit is reset.

Solid state drive with reset circuit and reset method thereof

A resonant power converter is provided and includes a capacitor, an inductive device, a first transistor, a second transistor, and a control circuit. The capacitor and the inductive device develop a resonant tank. The first transistor and the second transistor are coupled to switch the resonant tank. The control circuit generates a first signal and a second signal to control the first transistor and the second transistor respectively. Frequencies of the first signal and the second signal are changed for regulating output of the resonant power converter. The control circuit is further coupled to detect an input voltage of the resonant power converter. A pulse width of the second signal is modulated in response to change of the input voltage.

Asymmetrical resonant power converters

A synchronous rectifying circuit of a resonant switching power converter is provided to improve the efficiency. The synchronous rectifying circuit includes a power transistor and a diode connected to a transformer and an output ground of the power converter for rectifying. A sense transistor is coupled to the power transistor for generating a mirror current correlated to a current of the power transistor. A controller generates a driving signal to control the power transistor in response to a switching-current signal. A current-sense device is coupled to the sense transistor for generating the switching-current signal in response to the mirror current. The controller enables the driving signal to turn on the power transistor once the diode is forwardly biased. The controller generates a reset signal to disable the driving signal and turn off the power transistor once the switching-current signal is lower than a threshold.

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Taipei, Taiwan

Shih-Hung Hsieh