Taiwan Semiconductor Manufacturing Comp. Ltd.

United Microelectronics Corp.

Shih-Hsun Hsu

Hsien-Wei Chen

Shin-Puu Jeng

Hao-Yi Tsai

Shang-Yun Hou

Hsueh-Chung Chen

Keng-Ying Liao

Yi-Hung Chen

Yi-Fang Yang

Kuo-Cheng Lee

Yun-Wei Cheng

Chun-Hao Chou

Hsun-Ying Huang

Chia-Lin Hsu

Chia-Lun Tsai

Huai-jen Tung

Yu-Chien Ku

Chen-Hua Douglas Yu

Chun-Jen Chen

Shao-Chung Hu

Wei-Ti Hsu

Benson Liu

Art Yu

Anbiarshy Wu

Lin-Ko Feng

Jian-Hong Lin

Ping-Hao Lin

Shih-Cheng Chang

Yi-Jie Chen

Anbiarshy N F Wu

Chun-Chi Lee

Shih-Puu Jeng

Chih-Tao Lin

A semiconductor device includes a single-layered dielectric layer, a conductive line, a conductive via and a conductive pad. The conductive line and the conductive via are disposed in the single-layered dielectric layer. The conductive pad is extended into the single-layered dielectric layer to electrically connected to the conductive line.

Semiconductor device

The present disclosure relates to a semiconductor image sensor with improved quantum efficiency. The semiconductor image sensor can include a semiconductor layer having a first surface and a second surface opposite of the first surface. An interconnect structure is disposed on the first surface of the semiconductor layer, and radiation-sensing regions are formed in the semiconductor layer. The radiation-sensing regions are configured to sense radiation that enters the semiconductor layer from the second surface and groove structures are formed on the second surface of the semiconductor layer.

Image sensor with improved quantum efficiency surface structure

In some embodiments, an image sensor is provided. The image sensor comprises a first photodetector disposed within a front-side surface of a semiconductor substrate. A trench isolation structure is disposed over a back-side surface of the semiconductor substrate. The trench isolation structure includes a buffer layer and a dielectric liner. The buffer layer covers the back-side surface of the semiconductor substrate and fills trenches that extend downward into the back-side surface of the semiconductor substrate. The dielectric liner is disposed between the buffer layer and the semiconductor substrate. A composite grid structure has composite grid segments that are aligned over the trenches, respectively. The buffer layer separates the dielectric liner from the composite grid structure. A light shield structure is disposed within the buffer layer and directly overlies the first photodetector.

Embedded light shield structure for CMOS image sensor

A semiconductor device includes a substrate, a dielectric layer, a plurality of dielectric patterns and a conductive pad. The substrate includes a first surface and a second surface opposite to the first surface. The dielectric layer is disposed at the first surface of the substrate, and the substrate is disposed between the dielectric layer and the second surface of the substrate. The dielectric patterns are disposed on the dielectric layer and between the first surface and the second surface of the substrate. The conductive pad is inserted between the plurality of dielectric patterns and extended into the dielectric layer.

An image sensor device is provided. The image sensor device includes a substrate. The image sensor device includes a light-sensing region in the substrate. The image sensor device includes an isolation structure in the substrate. The isolation structure surrounds the light-sensing region. The image sensor device includes a grid layer over the substrate. The grid layer is over the isolation structure. The image sensor device includes a first lens over the light-sensing region and surrounded by the grid layer. The image sensor device includes a color filter layer over and in direct contact with the first lens. The first lens is embedded in the color filter layer. The image sensor device includes a second lens over the color filter layer.

Image sensor device having a first lens and a second lens over the first lens

An image sensor device is provided. The image sensor device includes a substrate. The image sensor device includes a light-sensing region in the substrate. The image sensor device includes an isolation structure in the substrate. The isolation structure surrounds the light-sensing region. The image sensor device includes a grid layer over the substrate. The grid layer is over the isolation structure. The image sensor device includes a first lens over the light-sensing region and surrounded by the grid layer. The image sensor device includes a color filter layer over and in direct contact with the first lens. The image sensor device includes a second lens over the color filter layer.

Image sensor device having first lens over a light-sensing region and surrounded by a grid layer

CMOS sensors and methods of forming the same are disclosed. The CMOS sensor includes a semiconductor substrate, a plurality of dielectric patterns, a first conductive element and a second conductive element. The semiconductor substrate has a pixel region and a circuit region. The dielectric patterns are disposed between the first portion and the second portion, wherein top surfaces of the plurality of dielectric patterns are lower than top surfaces of the first and second portions. The first conductive element is disposed below the plurality of dielectric patterns. The second conductive element inserts between the plurality of dielectric patterns to electrically connect the first conductive element.

CMOS sensors and methods of forming the same

A method for forming an image sensor device is provided. The method includes forming an isolation structure in a substrate. The method includes forming a light-sensing region in the substrate. The isolation structure surrounds the light-sensing region. The method includes forming a grid layer over the substrate. The grid layer is over the isolation structure and has an opening over the light-sensing region. The method includes forming a first lens in or over the opening. The method includes forming a second lens over the first lens and the grid layer.

Image sensor device and method for forming the image sensor device having a first lens and a second lens over the first lens

Image sensor with high quantum efficiency surface structure

A semiconductor device includes a substrate, a conductive layer, a transparent layer, a transparent hard mask layer, a carrier, and a device layer. The substrate has a first surface and a second surface opposite to each other. The conductive layer is disposed on the first surface of the substrate. The transparent layer is disposed on the conductive layer. The transparent hard mask layer is disposed on the transparent layer, in which the substrate has an etch selectivity with respect to the transparent hard mask layer. The device layer is disposed between the carrier and the second surface of the substrate, in which various portions of the device layer are respectively exposed by various through holes which pass through the transparent hard mask layer, the transparent layer, the conductive layer, and the substrate.

Method for manufacturing CMOS image sensor

CMOS sensors and methods of forming the same are disclosed. The CMOS sensor includes a semiconductor substrate, a dielectric layer, an interconnect, a bonding pad and a dummy pattern. The semiconductor substrate has a pixel region and a circuit region. The dielectric layer is surrounded by the semiconductor substrate in the circuit region. The interconnect is disposed over the dielectric layer in the circuit region. The bonding pad is disposed in the dielectric layer and electrically connects the interconnect in the circuit region. The dummy pattern is disposed in the dielectric layer and surrounds the bonding pad in the circuit region.

A semiconductor structure includes a daisy chain adjacent to an edge of a semiconductor chip. The daisy chain includes a plurality of horizontal metal lines distributed in a plurality of metallization layers, wherein the horizontal metal lines are serially connected; a plurality of connecting pads in a same layer and electrically connecting the horizontal metal lines, wherein the connecting pads are physically separated from each other; and a plurality of vertical metal lines, each connecting one of the connecting pads to one of the horizontal metal lines, wherein one of the plurality of connecting pads is connected to one of the plurality of horizontal metal lines by only one of the plurality of vertical metal lines; and a seal ring adjacent and electrically disconnected from the daisy chain.

Test structure for seal ring quality monitor

A semiconductor wafer structure includes a plurality of dies, a first scribe line extending along a first direction, a second scribe line extending along a second direction and intersecting the first scribe line, wherein the first and the second scribe lines have an intersection region. A test line is formed in the scribe line, wherein the test line crosses the intersection region. Test pads are formed in the test line and only outside a free region defined substantially in the intersection region.

Growing community of inventors

Keelung, Taiwan

Shih-Hsun Hsu