Megica Corporation

Au Optronics Corporation

Auo Corporation

Qualcomm Incorporated

National Science Council

Megic Corporation

Shih-Hsiung Lin

Mou-Shiung Lin

Hsin-Jung Lo

Jin-Yuan Lee

Chien-Kang Chou

Yang-En Wu

Hsi-Shan Kuo

Chiu-Ming Chou

Ying-Chih Chen

Jenn-Jia Su

Chen-Chi Martin Ma

Ke-Hung Chen

June Woo Lee

Chang-Cheng Chen

Sheng-Hung Wang

Yi-Shan Chang

Juin-Ming Wu

Ying-Cheng Chen

Wen-Hau Lee

A display panel includes a circuit substrate, pixel structures and a molding layer. The circuit substrate has first pad structures and second pad structures. The pixel structures are disposed above a display region of the circuit substrate. Each of at least a portion of the pixel structures includes a first light emitting diode, a first conductive block, and a first conductive connection structure. The first light emitting diode is disposed on a corresponding first pad structure. The first conductive block is disposed on a corresponding second pad structure. The first conductive connection structure electrically connects the first light emitting diode to the first conductive block. The molding layer is located above the circuit substrate and surrounds the first light emitting diode and the first conductive block. The first conductive connection structure is located on the molding layer.

Display panel comprising multiple pixel structures including repaired pixel structure

A display device includes a circuit substrate and a light-emitting diode. Two electrodes of the light-emitting diode are connected to two pads of the circuit substrate. Each electrode of the light-emitting diode includes a first conductive layer, a barrier layer, and a metal layer. The first conductive layer is connected to a semiconductor stack layer of the light-emitting diode. The barrier layer is electrically connected to the semiconductor stack layer of the light-emitting diode through the first conductive layer. The adhesion of the material selected for the first conductive layer to the semiconductor stack layer is greater than the adhesion of the material selected for the barrier layer to the semiconductor stack layer. The metal layer electrically connects the barrier layer to the corresponding one of the pads. The melting point of the metal layer is lower than 260 degrees Celsius.

Display device, light-emitting diode substrate, and fabrication method of display device

A light-emitting diode element includes a first-type semiconductor layer, a second-type semiconductor layer, an active layer, an insulating layer, a first electrode, a second electrode, a first passivation layer, a first seed layer, a first electroplating layer, a first solder and second solder. The insulating layer covers a sidewall of the first-type semiconductor layer, a sidewall of the second-type semiconductor layer and a sidewall of the active layer. The first passivation layer covers a portion of the insulating layer on the sidewall of the first-type semiconductor layer, the sidewall of the second-type semiconductor layer and the sidewall of the active layer. The first seed layer is disposed on the first passivation layer. The first electroplating layer is disposed on the first seed layer. The first solder and the second solder are electrically connected to a first conductive pattern and a second conductive pattern of the first electroplating layer.

Light-emitting diode element and method for manufacturing display apparatus

A display panel includes a pixel array substrate, a plurality of vertical light emitting devices and a flip-chip light emitting device. The pixel array substrate has a first pixel area and a second pixel area. The vertical light emitting devices are disposed in the first pixel area and the second pixel area and electrically connected to the pixel array substrate. The flip-chip light emitting device is disposed in the second pixel area and electrically connected to the pixel array substrate. A color of an emitted light beam of the flip-chip light emitting device and a color of an emitted light beam of one of the vertical light emitting devices located in the first pixel area are identical.

Display panel having vertical light emitting device and flip chip light emitting device

A fabrication method of a display device includes the following steps: providing a light-emitting diode (LED) display device including an circuit substrate, first LEDs, and a second LED; detecting the LED display device, wherein the second LED cannot emit light normally; removing the second LED from the circuit substrate; providing a LED substrate; transferring a third LED of the LED substrate to a first transferring substrate; transferring the third LED on the first transferring substrate to a second transferring substrate; and electrically connecting the third LED on the second transposed substrate to the circuit substrate.

Fabrication method of display device

A display apparatus, including a circuit substrate, a driving unit and a light-emitting unit is provided. The driving unit is disposed on the circuit substrate. The light-emitting unit is disposed on the circuit substrate. A thickness of the driving unit is substantially the same as a thickness of the light-emitting unit.

Display apparatus and manufacturing method thereof

A cylindrical bonding structure and its method of manufacture. The cylindrical bonding structure is formed over the bonding pad of a silicon chip and the chip is flipped over to connect with a substrate board in the process of forming a flip-chip package. The cylindrical bonding structure mainly includes a conductive cylinder and a solder block. The conductive cylinder is formed over the bonding pad of the silicon chip and the solder block is attached to the upper end of the conductive cylinder. The solder block has a melting point lower than the conductive cylinder. The solder block can be configured into a cylindrical, spherical or hemispherical shape. To fabricate the cylindrical bonding structure, a patterned mask layer having a plurality of openings that correspond in position to the bonding pads on the wafer is formed over a silicon wafer. Conductive material is deposited into the openings to form conductive cylinders and finally a solder block is attached to the end of each conductive cylinder.

Cylindrical bonding structure and method of manufacture

A method of fabricating an electronic apparatus having an active region and a peripheral region surrounding the active region is described. A first main device and a second main device are provided. An optical clear liquid adhesive (OCLA) is applied between the first main device and the second main device and within the active region. A photo-mask having a transparent region and an opaque region is provided above the second main device, and the transparent region corresponds to the peripheral region. An OCLA diffusion process is performed such that the OCLA diffuses from the active region to the peripheral region. During the OCLA diffusion process, a first irradiating process with the photo-mask is performed, such that the OCLA diffusing to the peripheral region is partially cured. After removing the photo-mask, a second irradiating process is performed, such that the OCLA is completely cured.

Method of fabricating electronic apparatus

A cylindrical bonding structure and its method of manufacture. The cylindrical bonding structure is formed over the bonding pad of a silicon chip and the chip is flipped over to connect with a substrate board in the process of forming a flip-chip package. The cylindrical bonding structure mainly includes a conductive pillar and a solder cap. The conductive pillar is formed over the bonding pad of the silicon chip and the solder cap is attached to the upper end of the conductive pillar. The solder cap has a melting point lower than the conductive pillar. The solder cap can be configured into a cylindrical, spherical or hemispherical shape. To fabricate the cylindrical bonding structure, a patterned mask layer having a plurality of openings that correspond in position to the bonding pads on the wafer is formed over a silicon wafer. Conductive material is deposited into the openings to form conductive pillars and finally a solder cap is attached to the end of each conductive pillar.

Method for fabricating circuit component

A method for fabricating and testing a wafer includes forming metal traces with metal pads, wherein forming the metal traces include forming a TiW layer on a passivation layer and on pads, next forming a seed layer on the TiW layer, next forming a photoresist layer on the seed layer, next forming a metal layer on the seed layer exposed by openings in the photoresist layer, next removing the photoresist layer, next removing the seed layer not under the metal layer, and then etching the TiW layer not under the metal layer with an etchant containing HOat a temperature of between 35 and 50&#xb0; C., or with an etchant containing HOand with ultrasonic waves applied to the etchant, next contacting probe tips of a probe card with some of the metal pads, next cleaning the probe tips until repeating the step of contacting the probe tips with some of the metal pads at greater than 100 times, and then after cleaning the probe tips, repeating the step of contacting the probe tips with some of the metal pads.

Method for forming post passivation Au layer with clean surface

A chip package comprises a first chip having a first side and a second side, wherein said first chip comprises a first pad, a first trace, a second pad and a first passivation layer at said first side thereof, an opening in said first passivation layer exposing said first pad, said first trace being over said first passivation layer, said first trace connecting said first pad to said second pad; a second chip having a first side and a second side, wherein said second chip comprises a first pad at said first side thereof, wherein said second side of said second chip is joined with said second side of side first chip; a substrate joined with said first side of said first chip or with said first side of said second chip; a first wirebonding wire connecting said second pad of said first chip and said substrate; and a second wirebonding wire connecting said first pad of said second chip and said substrate.

Stacked chip package with redistribution lines

A chip package includes a bump connecting said semiconductor chip and said circuitry component, wherein the semiconductor chip has a photosensitive area used to sense light. The chip package may include a ring-shaped protrusion connecting a transparent substrate and the semiconductor chip.

Chip package

This invention provides a wire bonding method, comprising providing an integrated circuit (IC) die having thereon a passivation layer and a plurality of first bonding pads exposed by respective openings in the passivation layer; forming a polymer layer on the passivation layer; forming an adhesive/barrier layer on the polymer layer; forming a metal pad layer on the adhesive/barrier layer; bonding a wire onto the metal pad layer to form a ball bond thereon; and after forming the ball bond on the metal pad layer, running the wire so as to contact the wire with a second bonding pad and forming a wedge bond thereto.

Wire bonding method for preventing polymer cracking

A method of assembling chips. A first chip and a second chip are provided. At least one conductive pillar is formed on the first chip, and a conductive connecting material is formed on the conductive pillar. The second chip also comprises at least one conductive pillar. The first chip is connected to the second chip via the conductive pillars and the conductive connecting material.

Growing community of inventors

Hsinchu, Taiwan

Shih-Hsiung Lin