Chunghwa Picture Tubes, Ltd.

Shih-Hsiung Huang

Wen-Tse Tseng

Juin-Ying Huang

A noise suppressing method for a flat panel display which is driven by a time controller IC and a plurality of driver IC's is described. The noise suppressing method includes providing a signal detect circuit and a video signal processor; detecting a switch-off signal while switching off the flat panel display, and when the switch-off signal is detected, the video signal processor controls output the driver IC's to output a charge reset signal; and switching off the flat panel display after the flat panel display has performed charge reset.

Noise suppressing method for flat panel display

A scanner integrated circuit comprises a gate integrated circuit including a shift register, a delay unit, a voltage detecting unit and a logic unit for achieving an output enable function so that the integrated circuit can reduce the pin numbers and the package volume and decrease the chip cost.

Scanner integrated circuit

A noise suppressing method for switching on/off a flat panel display. A signal detect circuit and a video signal processor are embedded in a time controller IC. At the switch-on transient, the signal detect circuit functions to detect whether the signal is stable. When an unstable signal is detected, the video signal processor controls the driver IC to output a black burst signal. At the switch-off transient, the signal detect circuit is used to detect the switch-off signal. When the switch-off signal is detected, the video signal processor controls the driver IC to output a charge reset signal. The flat panel display is switched off after the charge reset operation is performed for all the pixels.

Noise suppressing method for switching on/off flat panel display

A structure capable of reducing the amount of transferred digital image data of a digital display has a digital image and timing control unit for controlling the receiving and transfer of image data and providing timing control. The digital image and timing control unit includes at least one first and second registers, a data address flag unit, and a control logic. The first and second registers serves to buffer the image data of the n-th image data line and (n+1)-th image data line. The control logic compares the image data and enables the flags in the data address flag unit corresponding to the image position to be updated, so as to determine the image data to be transferred.

Structure capable of reducing the amount of transferred digital image data of a digital display

A designing method and circuit of gray level and luminance characteristic of liquid crystal display are disclosed. A LCD is used to actually measure data about gray level and luminance of the liquid crystal display for building a gray level and luminance database of the liquid crystal display. The characteristic of gray level and luminance at other voltages is calculated to estimate a relation between gray level and luminance using a different driving circuit chip, thereby adjusting internal resistance of the driving circuit chip of the liquid crystal display to have optimal relation between gray level and luminance, and adjusting black signal high voltage, white signal high voltage, white signal low voltage and black signal low voltage to match the display data and generate outputs of a high voltage and a low voltage of each gray level.

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Taoyuan, Taiwan

Shih-Hsiung Huang