Inventec Corp.

Shih-Hao Liu

Chun-Hua Xia

Li-Hong Huang

Lan Huang

Li Zeng

Xiao-Bing Zou

Hai-Yi Ji

Lan-Lan Fang

Xiao-Ru Wu

Da-Wei Hu

Jie-guang Zhang

A computer apparatus is disclosed. The computer apparatus mentioned above includes a main board and an external sub-board. The main board includes a connector, a management chip, a first basic input output system and a selector. The external sub-board includes an external input output system. The management chip detects a coupling state of the main board and the external sub-board, and generates a detecting signal. The selector enables one of the first basic input output system and the external input output system and disables the other one.

Computer apparatus with switchable input output system

A computer system including a first and second main boards, a judgment unit, a power supply, a first switch and second switch is provided. The judgment unit receives a first and second power start signals from the first and second main boards, and outputs a total power start signal. The power supply outputs a power reply signal according to the total power start signal. The first and second switches determine whether to output a power good signal individually according to the first and second power start signals. When one of the first and second power start signals is available, the total power start signal and the power reply signal are available, and the power supply outputs an operating voltage. When the first and second power start signals are unavailable, the total power start signal and the power reply signal are unavailable, and the power supply stops outputting the operating voltage.

Computer system

A computer system including a power supply and N main boards is provided, herein N is an integer greater than 1. The power supply generates a main power and a standby power. The N main boards respectively correspond to one standby voltage. The 1to the (N&#x2212;1)main boards respectively generate the corresponding standby voltage by the main power in a power-on state, and respectively generate the corresponding standby voltage by the standby power in a power-off state. The Nmain board generates the corresponding standby voltage by the main power in the power-on and power-off state.

A storage device backplane and an identification circuit for identifying using situations of the storage device backplane are provided. The storage device backplane possesses a first connection interface and a second connection interface, for being used as a first backplane supporting a motherboard, or a second backplane cascaded to the first backplane, or a first backplane supporting a daughterboard of the motherboard. The first and second backplanes possess the same storage device backplane structure. If the storage device backplane is used as the first backplane, a first connection interface of the first backplane is coupled to the motherboard or the daughterboard thereof; if the storage device backplane is used as the second backplane, a first connection interface of the second backplane is coupled to a second connection interface of the first backplane. The identification circuit identifies using situations of the storage device backplane and display corresponding correct indicator number.

Storage device backplane and identification circuit

A power converting device including a pulse width modulation circuit, a switch unit, a power output unit and a voltage start unit is provided. The pulse width modulation circuit increases a start voltage in a soft start mode and is operated under the start voltage to generate a pulse width modulation signal. The switch unit is for receiving an input voltage, and forming a charge path and a discharge path alternately according to the pulse width modulation signal. The power output unit converts the input voltage to a core voltage in accordance with the charge path and the discharge path. The voltage start unit is for detecting the start voltage, and for transmitting a control signal to interrupt the formation of the discharge path when the start voltage is smaller than the core voltage.

Soft start unit for a power converting device

A core voltage controlling apparatus suitable for a center processing unit (CPU) is provided. The apparatus includes a level shifting unit, a time-delay unit and a logic unit. An input terminal of the level shifting unit receives and shifts a first voltage signal, and an output terminal generates a second voltage signal, in which the first voltage signal indicates a power-on stable state, and the second voltage signal indicates a magnitude of the core voltage. The time-delay unit delays the second voltage signal to generate a third voltage signal. The logic unit is coupled to the time-delay unit for performing a logic operation on the third voltage and a fourth voltage signal transmitted by a power supply, and generating a fifth voltage signal for controlling a core voltage generator whether to provide the core voltage to the CPU or not, in which the fourth voltage signal indicates a power state.

Core voltage controlling apparatus

An apparatus for resolving conflicts happened between two I2C slave devices with the same addressed address is provided. The apparatus is composed by all cheap electronic devices, so as to achieve a purpose of lowering a cost for design. In addition, in the apparatus for resolving conflicts happened between two I2C slave devices with the same addressed address of the invention, all the IC slave devices are addressed by an IC master device to perform the data transmission subsequently before a basic input/output system (BIOS) completes a power-on self-test (POST), but all the IC slave devices are addressed by a system chip (for example, a baseboard management controller (BMC)) to perform the data transmission subsequently after the BIOS completes the POST. Therefore, the purpose of performing the data transmission for all the IC slave devices on real time is achieved.

[object Object]

A power discharge control system for eliminating residual voltage of electronic components in an electronic device, is proposed, which includes a control IC for outputting first electrical signals of a first level and a second level respectively corresponding to power on and power off of the electronic device; a power supply for receiving the first electrical signal, and providing or terminating operation power to the electronic component accordingly, and delaying outputting of a second electrical signal equivalent to the first electrical signal level; a logic judgment module connected to the control IC and the power supply for receiving the first and the second electrical signals for executing logic operation process, when at least one of the first and the second electrical signals is at the first level, a third electrical signal of a third level is outputted, when both the first and the second electrical signals are at the second level, a third electrical signal of a fourth level is outputted; and at least a discharge module for receiving the third electrical signal, when the third electrical signal is at the third level, the discharge process is skipped, when the third electrical signal is at the fourth level, the discharge process is executed.

Power discharge control system

The present invention provides an apparatus for adjusting a working frequency of a VRD. The apparatus includes a current detecting circuit, a variable resistance module, and a controller. The current detecting circuit is adapted for determining an output load state of the VRD by detecting a value of a current outputting from the VRD, and outputting a control signal for adjusting the working frequency of the VRD according to the output load state of the VRD. The variable resistance module is coupled to the VRD, and is adapted for providing an external resistor to the VRD. The controller is coupled to the current detecting circuit, and is adapted for receiving the control signal, and adjusting a resistance of the variable resistance module, so as to adjust the working frequency of the VRD.

Apparatus and method for adjusting working frequency of voltage regulator down circuit (VRD) by detecting current

A voltage regulating circuit including an error signal generator, a comparator, a switch unit, a low-pass filter and a modulating unit is provided. The error signal generator respectively receives a reference voltage signal and a feedback signal, and generates an error signal. The comparator respectively receives the error signal and a comparing signal, and generates a pulse width modulation signal. The switch unit regulates an input voltage signal to generate an output voltage signal according the pulse width modulation signal. The low-pass filter filters out the high frequency of the output signal and produces the feedback signal. The modulating unit is coupled to the low-pass filter and the error signal generator for regulating a transient voltage of the output voltage signal.

Voltage regulating circuit

A computer capable of automatic bandwidth configuration according to I/O expansion card (e.g., PCI-Express expansion card) type is provided. A motherboard of the computer includes an I/O expansion slot, a chipset, and a configuration setting circuit. When the I/O expansion slot supports different types of I/O expansion cards having multiple interface card slot combinations, a corresponding bandwidth configuration message is generated on the I/O expansion card. The bandwidth configuration message is used to indicate the type of the I/O expansion card that is being used and thereby control the configuration setting circuit to adjust the bandwidth configuration in the chipset.

Computer capable of automatic bandwidth configuration according to I/O expansion card type

A feedback and comparison apparatus applicable to a DC-DC voltage converter is provided. The feedback and comparison apparatus includes a comparator and a voltage feedback circuit. The voltage feedback circuit includes a first voltage dividing component and a second voltage dividing component. The comparator compares a feedback voltage with a first reference voltage, and outputs a control signal to the DC-DC voltage converter according to the comparing result. One end of the first voltage dividing component is coupled to an output voltage output by the DC-DC voltage converter and the other end of the first voltage dividing component is coupled to one end of the second voltage dividing component, for providing the feedback voltage. The other end of the second voltage dividing component is coupled to a second reference voltage. The present invention is applicable to a situation that the output voltage is smaller than the reference voltage.

Feedback and comparison apparatus and DC-DC voltage converter

A structure compatible with I2C bus and system management (SM) bus is provided. The structure includes a first device having an I2C bus interface, a second device having a SM bus interface, and a timing buffering apparatus connected between the I2C bus interface and the SM bus interface. The timing buffering apparatus provides a time delay when the first device sends data to the second device so as to meet the requirement of the second device to data holding time.

Structure compatible with I2C bus and system management bus and timing buffering apparatus thereof

A power factor correction circuit including a boost converter, a first capacitor, a first resistor, and a boost control unit is provided. The boost control unit includes a signal generator and a frequency controller. The boost converter transforms a rectified voltage to a correction voltage according to a pulse width modulation (PWM) signal. The first capacitor and the first resistor are coupled between an input terminal and a ground terminal of the boost converter. The boost control unit is adapted to generate the PWM signal, and adjust a duty cycle and a frequency of the PWM signal according to a current flowing through the first resistance, the rectified voltage and the correction voltage. Wherein, the signal generator is adapted to generate a ramp signal and adjust a slope of the ramp signal according to a charging current. The frequency controller adjusts the charging current according to the rectified voltage.

Power factor correction circuit and power supply apparatus thereof

A fan speed control device includes a management selection module, a first and a second buffers, a resistor, a transistor, and a switch. Depending upon whether a motherboard supports a system of a baseboard management control or not, the fan speed control device selectively uses an indicative signal of a serial input and output interface or an indicative signal of the baseboard management control to indicate a power-on status. At the power-on moment, the fan speed control device controls the fan to operate at its minimum speed, so that a system crash due to a power output shortage of a power supply can be avoided. As the system enters stable operation, the fan speed is controlled by a pulse width modulation signal.

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Taipei, Taiwan

Shih-Hao Liu