Au Optronics Corporation

Shih-Chyn Lin

Wen-Pin Chen

Kuei-Sheng Tseng

Ming-Chang Shih

Shyh-Feng Chen

Hsiang-Pin Fan

Chen-Yi Wu

Tsung-Cheng Lin

Shao-Chun Cheng

Chuo-Hsien Lin

Chia-Kong Huang

Wei-Jen Kao

A compensation circuitry of gate driving pulse signal is adapted to receive a gate driving pulse signal and includes a pre-processing circuit, a peak detector, a discharge circuit, a voltage buffer and a charge pump circuit. The pre-preprocessing circuit performs a pre-processing operation to the gate driving pulse signal to adjust a voltage thereof. The pre-processed gate driving pulse signal then is transmitted to the peak detector for obtaining a peak voltage after a charging operation, and also is transmitted to the discharge circuit to determine whether to enable the discharge circuit so that providing the peak detector with a discharge loop when the discharge circuit is enabled. The charge pump circuit acquires the peak voltage through the voltage buffer and then modulates a waveform of the gate driving pulse signal according to the peak voltage. A display device using the above compensation circuitry also is provided.

Compensation circuitry of gate driving pulse signal and display device

A shift register includes a control circuit, a pull-up circuit and a pull-down circuit. The control circuit generates a control signal according to a start pulse signal during being enabled. The pull-up circuit produces a gate pulse signal according to a clock signal during being enabled by the control signal. The pull-up circuit includes a dual-gate transistor. A first gate of the dual-gate transistor is electrically coupled to the control signal, a second gate of the dual-gate transistor is electrically coupled to a predetermined voltage, the source/drain of the dual-gate transistor serves as an output terminal for the gate pulse signal, and the drain/source of the dual-gate transistor is electrically coupled to the clock signal. The pull-down circuit pulls a potential at the first gate and another potential at the output terminal down to a power supply potential during the pull-up circuit is disabled.

Shift register

A pixel structure electrically connected to a scan line and a data line is provided. The pixel structure includes an active device, a first pixel electrode, a mean potential equilibrium circuit, and a second pixel electrode. The active device is electrically connected to the scan line and the data line. The first pixel electrode is electrically connected to the active device. The mean potential equilibrium circuit is electrically connected to the scan line and the data line. The second pixel electrode is electrically connected to the mean potential equilibrium circuit.

Pixel structure

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Hsin-Chu, Taiwan

Shih-Chyn Lin