Amic Technology Corporation

Shih-Chun Fu

Kou-Su Chen

Jui-Te Chan

A pre-erase/incremented erase mechanism is employed to reduce excessive tunnel oxide fields in flash memory cells. A variable conditioning signal removes charge from &ldquo;fast&rdquo; bits in the array, so that they are configured to have threshold voltages closer to an ideal initial state in preparation for an erase cycle. In this manner, the voltage thresholds are tightened and equalized, so that over-erasure problems associated with Fowler-Nordheim tunneling erase operations are substantially reduced, and endurance cycles for the array are maximized. The invention can be used in a device in the field, or as part of a design process for a flash memory cell to evaluate device performance.

Method for manufacturing non-volatile memory cell array

Method for operating non-volatile memory cells

Circuit and method for equalizing erase rate of non-volatile memory cells

System and method for erasing non-volatile memory cells

Circuit and method for pre-erasing/erasing flash memory array

A novel cell conditioning mechanism is employed to equalize charge discharge characteristics of flash memory cells. A variable conditioning signal removes charge from 'fast' bits in the array, and leaves other cells relatively unaffected so that the fast bits are adjusted to have threshold voltages closer to those of the other cells in an array. In this manner, the voltage thresholds are tightened and equalized, so that over-erasure problems associated with Fowler-Nordheim tunneling erase operations are substantially reduced, and endurance cycles for the array are maximized. The invention can be used in a device in the field, or as part of a design process for a flash memory cell to evaluate device performance.

Circuit and method for conditioning flash memory array

Growing community of inventors

Hsin-Chu, Taiwan

Shih-Chun Fu