Chunghwa Picture Tubes, Ltd.

Mediatek Corporation

Asia Vital Components Co., Ltd.

Asustek Computer Inc.

National Yang Ming Chiao Tung University

Aopen Incorporated

Dyaco International Inc.

Shih-Chieh Lin

Hsiang-Tan Lin

Sheng-Ming Chang

Nan-Cheng Chen

Wen-Chuan Wang

Wei-Lien Sung

Chun-Chieh Chiu

Chia-Hui Liu

Chun-Ping Chen

Yang Liu

Ying Liu

Chu-Hsien Chou

Tzu-Chiang Shen

Hui-Chi Tang

Bo-Han Chu

Fu-Kang Pan

Shao-Lun Chang

Han-Lung Liu

Chien-Hung Zordius Chen

Po-Tsun Liu

Bor-Haw Chang

Wei-Cheng Chen

Pei-Lin Hsieh

Ching-Chih Li

Yue-Li Chao

Yung-Ching Huang

Kuo-Hsun Huang

Guang-Ting Zheng

Hsi-Feng Lin

Ghun-Kai Tseng

Yu-Hung Li

Jia-Ling Lu

Shao-Huan Hung

Ping-Chi Kuo

A microelectronic system includes a base and a semiconductor package mounted on the base. The base includes an internal conductive layer and a build-up layer on the internal conductive layer. The build-up layer includes a top conductive layer. A plurality of microvias is disposed in the build-up layer to electrically connect the top conductive layer with the internal conductive layer. A power/ground ball pad array is disposed in the top conductive layer. The power/ground ball pad array includes power ball pads and ground ball pads arranged in an array with a fixed ball pad pitch P, and the power/ground ball pad array includes a 4-ball pad unit area comprised of only one ground ball pad and three power ball pads, or comprised of only one power ball pad and three ground ball pads. The 4-ball pad unit area has a rectangular shape and a dimension of about 2P&#xd7;2P.

Microelectronic system including printed circuit board having improved power/ground ball pad array

A driving circuit in this disclosure includes plural stages of shift register circuits. Every stage in the shift register circuits includes an enabling control circuit, a first output circuit, a second output circuit and a disabling control circuit. The enabling circuit is configured to control the voltage of the first operation node according to enabling signal. The first output unit is configured to generate the first driving signal according to the voltage of the first operation node and the first clock signal. The second output unit is configured to generate the second driving signal according to the voltage of the first operation node and the second clock signal. The disabling control unit is used to pull low the voltage of the first operation node and output terminal of the first and second output unit to the reference voltage according to the first, third, and fourth clock signals.

Driving circuit and driving method

A microelectronic system includes a printed circuit board and a semiconductor package mounted on the printed circuit board. The printed circuit board includes a laminated core having an internal conductive layer and a build-up layer. The build-up layer includes a top conductive layer. Microvias are disposed in the build-up layer to connect the top conductive layer with the internal conductive layer. A power/ground ball pad array is disposed in the top conductive layer. The power/ground ball pad array includes power ball pads and ground ball pads arranged in an array with a fixed ball pad pitch P. The power/ground ball pad array includes a 4-ball pad unit area comprised of only one ground ball pad and three power ball pads, or comprised of only one power ball pad and three ground ball pads. The 4-ball pad unit area has a rectangular shape and a dimension of about 2P&#xd7;2P.

Fall prevention attachment for exercise machine

A layout method for a printed circuit board (PCB) is provided. The method obtains a memory type of a dynamic random access memory (DRAM) to be mounted on the PCB, obtains a module group from a database according to the memory type of the DRAM, wherein the module group comprises a plurality of routing modules, obtains a plurality of PCB parameters, selects a specific routing module from the module group according to the PCB parameters, and implements the specific routing module into a layout design for PCB fabrication. The specific routing module comprises layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip.

Layout method for printed circuit board

A display panel includes a substrate, and a pixel array and a gate driving circuit. The gate driving circuit provides gate driving signals to the pixel array, and includes shift registers, wherein each shift register includes a voltage providing unit, a first driving transistor, a voltage transmitting unit and a second driving transistor. The voltage providing unit receives a setting signal and a system high voltage to provide a first terminal voltage. The first driving transistor receives a first clock signal and the first terminal voltage to provide a first gate driving signal. The voltage transmitting unit receives the first gate driving signal to provide a second terminal voltage. The second driving transistor receives a second clock signal and the second terminal voltage to provide a second gate driving signal. Therefore, the influence caused by large difference of driving capabilities of the first and the second driving transistor is avoided.

Display panel

A printed circuit board for mobile platforms includes a core substrate having a first side, a ground plane covering on the first side, a first insulating layer covering the ground plane, and a plurality of first signal traces and a plurality of first ground traces, alternatively arranged on the first insulating layer, a second insulating layer connecting to the first insulating layer, and a plurality of second signal traces separated from each other, disposed on the second insulating layer, wherein the second signal traces are disposed directly on spaces between the first signal traces and the first ground traces adjacent thereto, wherein coverage of the ground plane is corresponding to disposition of the first signal trace, the first ground trace, the second signal trace and the second ground trace.

Printed circuit board for mobile platforms

A printed circuit board includes a laminated core including at least an internal conductive layer, and a build-up layer on the laminated core. The build-up layer includes a top conductive layer. A plurality of microvias is disposed in the build-up layer to electrically connect the top conductive layer with the internal conductive layer. A power/ground ball pad array is disposed in the top conductive layer. The power/ground ball pad array includes power ball pads and ground ball pads arranged in an array with a fixed ball pad pitch P. The power/ground ball pad array includes a 4-ball pad unit area that is comprised of only one ground ball pad and three power ball pads, or comprised of only one power ball pad and three ground ball pads. The 4-ball pad unit area has a rectangular shape and a dimension of about 2P&#xd7;2P.

Printed circuit board having power/ground ball pad array

A series fan includes a first fan and a second fan. The first fan has a first frame, a second frame and a first flow passage. The second fan has a third frame, a fourth frame and a second flow passage. A first static blade is disposed at the first frame, while a second static blade is disposed at the fourth frame. A first dynamic blade assembly is disposed in the first flow passage, while a second dynamic blade assembly is disposed in the second flow passage. The second frame is assembled with the third frame. The first and second static blades serve to enhance the support strength and protection effect for the series fan. In addition, the first and second dynamic blade assemblies can be designed with an increased aerodynamic volume.

Series fan

A bladeless fan structure includes a driving member, a pipe member, and at least one air-pressure increasing area. The driving member has a shaft connected and extended through the pipe member, and a first space is formed between an inner surface of the pipe member and an outer surface of the shaft. The air-pressure area is provided on the inner surface of the pipe member or the outer surface of the shaft. The pipe member is provided with at least one opening communicating with the first space and the air-pressure increasing area. When the driving member drives the shaft to rotate in and relative to the pipe member, air in the first space is brought to flow and is compressed in a direction along the air-pressure increasing area to blow out of the pipe member via the opening to achieve the function of a bladeless fan.

Bladeless fan structure

A layout method for a printed circuit board (PCB) is provided. A memory type of a dynamic random access memory (DRAM) to be mounted on the PCB is obtained. A module group is obtained from a database according to the memory type of the DRAM, wherein the module group includes a plurality of routing modules. A plurality of PCB parameters are obtained. A specific routing module is selected from the module group according to the PCB parameters. The specific routing module is implemented into a layout design of the PCB. The specific routing module includes layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip.

A fan rotor protection structure includes a fan wheel and an annular member. The fan wheel has a hub and a plurality of blades. The hub has a top portion and a side wall portion, which together define a receiving space in the hub. The annular member has one side aligned with and connected to an end surface of the side wall portion opposite to the top portion, and defines an opening communicable with the receiving space in the hub. With the annular member, foreign matters are stopped from entering into and accumulating in the fan rotor, enabling largely increased fan service life and more stable flow field around the fan.

Fan rotor protection structure

The invention provides a printed circuit board for mobile platforms. An exemplary embodiment of the printed circuit board for mobile platforms includes a core substrate having a first side. A ground plane covers the first side. A first insulating layer covers the ground plane. A plurality of first signal traces and a plurality of first ground traces are alternatively arranged on the first insulating layer. A second insulating layer connects to the first insulating layer. A plurality of second signal traces separated from each other is disposed on the second insulating layer, wherein the second signal traces are disposed directly on spaces between the first signal traces and the first ground traces adjacent thereto.

A securing device is adapted to secure a central processing unit to a circuit board. The securing device includes first and second seats secured to the circuit board. The securing device further includes a press member stacked on and pressed against the central processing unit, and having a side edge portion that is connected pivotally to the first seat, and an opposite side edge portion that is adjacent to the second seat. The securing device further includes an engaging rod pressed against the press member, and having one end that is connected pivotally to the second seat and the other end removably engaged with the first seat for securing the central processing unit to the board body.

Securing device, and assembly including the securing device and a heat dissipating module

A capacitor structure of gate driver in panel (GIP) includes a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, a first and second transparent capacitor electrode layers. The first dielectric layer covers the first metal layer. The second metal layer is disposed on the first dielectric layer and coupled to the first metal layer. The second dielectric layer covers the second metal layer. The first transparent capacitor electrode layer is disposed on the first dielectric layer and connected to the second metal layer. The second transparent capacitor electrode layer is disposed on the second dielectric layer and coupled to the first metal layer, in which the second and first transparent capacitor electrode layers are arranged to be stacked in a thickness direction and mutually opposed across the second dielectric layer therebetween.

Growing community of inventors

Taipei, Taiwan

Shih-Chieh Lin