Taiwan Semiconductor Manufacturing Comp. Ltd.

Shih-Cheng Yang

Yung-Chow Peng

Chung-Kai Lin

Jaw-Juinn Horng

Amit Kundu

Chung-Min Fu

Wan-Yu Lo

A system and method for designing integrated circuits and predicting current mismatch in a metal oxide semiconductor (MOS) array. A first subset of cells in the MOS array is selected and current measured for each of these cells. Standard deviation of current for each cell in the first subset of cells is determined with respect to current of a reference cell. Standard deviation of local variation can be determined using the determined standard deviation of current for one or more cells in the first subset. Standard deviations of variation induced by, for example, poly density gradient effects, in the x and/or y direction of the array can then be determined and current mismatch for any cell in the array determined therefrom.

Analytical model for predicting current mismatch in metal oxide semiconductor arrays

In some embodiments, in a method, a layout of a circuit is received. A netlist with indicated pattern density (PD)-dependent mismatch elements associated with different PDs, respectively, is generated using the layout. A simulation on the netlist is performed such that when the PD-dependent mismatch elements are modeled in the simulation, corresponding model parameters of the PD-dependent mismatch elements are generated using variation distributions with different spreads.

Pattern density-dependent mismatch modeling flow

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Zhubei, Taiwan

Shih-Cheng Yang