Sony Corporation

Sumitomo Electric Industries, Limited

Other

Murata Manufacturing Co., Ltd.

Murata Manufacturingco., Ltd.

Shigetaka Tomiya

Tomonori Hino

Takao Miyajima

Katsunori Yanashima

Takaaki Ami

Akira Ohmae

Michinori Shiomi

Akira Ishibashi

Hironobu Narui

Noriyuki Futagawa

Tsuyoshi Tojo

Tsunenori Asatsuma

Etsuo Morita

Kazushi Nakano

Satoshi Ito

Izuho Hatada

Yuuji Hiramatsu

Kensaku Motoki

Masaharu Nagai

Osamu Goto

Takeharu Asano

Koshi Tamamura

Nobukata Okano

Satoru Kijima

Kenji Funato

Satoshi Matsumoto

Masatomo Tanaka

Yuto Horiuchi

Hiroyuki Okuyama

Masao Ikeda

Tadashi Yamamoto

Shinji Tanaka

Satoshi Taniguchi

Yuki Maeda

Shuji Goto

Akira Usui

Kunihiko Tasai

Hironori Tsukamoto

Takashi Tange

Eiji Nakayama

Yoshifumi Shimizu

Atsushi Yasuda

Kazuhiko Morizawa

Nobutaka Okano

Naoki Koshitani

Rikako Minatoya

Yuusuke Nakayama

K Motoki

A charge and discharge control device is provide. The charge and discharge control device includes a determination circuitry configured to determine an ion diffusion rate associated with electric conduction in a secondary battery, and determine a time integrated value of an overcharged amount of an active material based on the ion diffusion rate and a charge condition; an evaluation circuitry configured to evaluate the charge condition of the secondary battery based on a determination result obtained by the determination circuitry; and a charge and discharge controller configured to control state of current application and voltage application to the secondary battery at a time of charging or discharging the secondary battery based on an evaluation result obtained by the evaluation circuitry.

Charge and discharge control device, charge and discharge control method, battery pack, electronic equipment, electric vehicle, power tool and power storage system

Provided is a technology that can improve a cycle property without lowering a volume energy density. The present technology provides a method for evaluating a secondary battery, including conducting at least: a determination step of determining a degree of diffusion defect of an ion that performs electric conduction; an evaluation step of evaluating a state of the secondary battery on the basis the result of the determination in the determination step; and a control step of controlling states of current application and voltage application on the secondary battery during charging or during discharging of the secondary battery on the basis of the result of the evaluation in the evaluation step.

Secondary battery, evaluation method and production method therefor, and charge-discharge control device

A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.

Nitride-based III-V group compound semiconductor

There is provided a light-emitting element including a laminated structure including a first compound semiconductor layer having a first conductivity type, a second compound semiconductor layer having a second conductivity type different than the first conductivity type, and a third compound semiconductor layer formed between the first and second compound semiconductor layers and including an active layer. A second end surface of the second compound semiconductor layer and a third end surface of the third compound semiconductor layer are formed at respective second and third angles theta2 and theta3 relative to a virtual vertical direction of the laminated structure and satisfy the following relationship: 'absolute value of thetais equal to or greater than 0 degree and smaller than absolute value of theta'.

Light-emitting element

Method for growing a nitride-based III-V Group compound semiconductor

Method for growing a nitride-based III-V group compound semiconductor

Disclosed herein is fine particles of core-shell structure, each particle being composed of a core particle which is formed from a first material and has the face-centered cubic crystal structure and a shell layer which is formed from a second material differing from the first material on the surface of the core particle and has the face-centered cubic crystal structure, the fine particles containing particles which are multiply twinned fine particles and are surrounded by the {111} crystal plane.

Fine particles of core-shell structure and functional device incorporated therewith

A method for making a light-emitting diode, which including the steps of: providing a substrate having at least one recessed portion on one main surface and growing a first nitride-based III-V group compound semiconductor layer through a state of making a triangle in section having a bottom surface of the recessed portion as a base thereby burying the recessed portion; laterally growing a second nitride-based III-V group compound semiconductor layer from the first nitride-based III-V group compound semiconductor layer over the substrate; and successively growing a third nitride-based III-V group compound semiconductor layer of a first conduction type, an active layer and a fourth nitride-based III-V group compound semiconductor layer of a second conduction type on the second nitride-based III-V group compound semiconductor layer.

Light-emitting diode, method for making light-emitting diode, integrated light-emitting diode and method for making integrated light-emitting diode, method for growing a nitride-based III-V group compound semiconductor, light source cell unit, light-emitting diode

When a semiconductor light emitting device or a semiconductor device is manufactured by growing nitride III-V compound semiconductor layers, which will form a light emitting device structure or a device structure, on a nitride III-V compound semiconductor substrate composed of a first region in form of a crystal having a first average dislocation density and a plurality of second regions having a second average dislocation density higher than the first average dislocation density and periodically aligned in the first region, device regions are defined on the nitride III-V compound semiconductor substrate such that the device regions do not substantially include second regions, emission regions or active regions of devices finally obtained do not include second regions.

Method of manufacturing a semiconductor light emitting device, semiconductor light emitting device, method of manufacturing a semiconductor device, semiconductor device, method of manufacturing a device, and device

The present invention is a nitride compound semiconductor laser, in which a cleaved end face is flat, and a breakdown of a laser end face induced during an operation can be suppressed, which consequently enables a life to be prolonged. In the nitride compound semiconductor laser, a stress concentration suppression layer is formed between an active layer and a cap layer.

Nitride semiconductor laser

When a semiconductor light emitting device or a semiconductor device is manufactured by growing nitride III&#x2013;V compound semiconductor layers, which will form a light emitting device structure or a device structure, on a nitride III&#x2013;V compound semiconductor substrate composed of a first region in form of a crystal having a first average dislocation density and a plurality of second regions having a second average dislocation density higher than the first average dislocation density and periodically aligned in the first region, device regions are defined on the nitride III&#x2013;V compound semiconductor substrate such that the device regions do not substantially include second regions, emission regions or active regions of devices finally obtained do not include second regions.

When making a growth mask on a substrate and using the growth mask to selectively grow nitride III-V compound semiconductors on the substrate, a multi-layered film including a nitride forming at least its top surface is used as the growth mask. The growth mask may be combination of an oxide film and a nitride film thereon, combination of a metal film and a nitride film thereon, combination of an oxide film, a film thereon made up of a nitride and an oxide, and a nitride film thereon, or combination of a first metal film, a second metal film thereon different from the first metal film and a nitride film thereon, for example. The oxide film may be a Si0 , for example, the nitride film may be a TiN film or a SiN film, the film made up of a nitride and an oxide may be a SiNO film, and the metal film may be a Ti film or a Pt film, for example.

Growth method of a nitride III-V compound semiconductor, manufacturing method of a semiconductor device, and semiconductor device

A compound semiconductor substrate is manufactured by forming a higher-quality compound semiconductor layer having a smaller number of crystalline defects on a single-crystal substrate, and removing the single-crystal substrate without causing damage to the compound semiconductor layer. The method comprises the steps of forming the compound semiconductor layer (first, second and third compound semiconductor layers) on the single-crystal substrate (sapphire substrate) through crystal growth so as to partially have a space between the compound semiconductor layer and the single-crystal substrate; and removing the compound semiconductor layer from the sapphire substrate by irradiating the compound semiconductor layer from a side of the sapphire substrate with a laser beam passing through the single-crystal substrate and being absorbed in the compound semiconductor layer to melt an interface between the single-crystal substrate and the compound semiconductor.

Method of manufacturing compound semiconductor substrate

A semiconductor thin film includes an underlying semiconductor layer in which a plurality of facets are arranged, and a selectively grown/buried semiconductor layer formed to cover the underlying semiconductor layer, wherein the facets are formed by planes tilted with respect to the disposition plane of the underlying semiconductor layer. In this semiconductor thin film, threading-dislocations are formed in the selectively grown/buried semiconductor layer in such a manner that each of the threading-dislocations bendingly extends from one of the facets of the underlying semiconductor layer in the direction substantially along the disposition plane of the underlying semiconductor layer, being joined to another of the threading-dislocations bendingly extending from the opposed one of the facets, and bendingly extends from the joined portion in the direction crossing the disposition plane of the underlying semiconductor layer. As a result, low defect density regions are formed in the selectively grown/buried semiconductor layer. Further, since a SiO mask is not buried, a deviation in crystal orientation can be suppressed.

Method of forming semiconductor thin film of group III nitride compound semiconductor.

Growing community of inventors

Kanagawa, Japan

Shigetaka Tomiya