Nihon Dempa Kogyo Co., Ltd.

Shigeru Takegishi

Kaoru Kobayashi

Nobuo Tsukamoto

A control circuit includes a storage unit, a generation unit, an update unit, and a rotation control unit. The storage unit stores a predetermined number of register values to designate a step frequency of a stepper motor. The generation unit generates a micro step clock signal every time a period corresponding to each of the predetermined number of register values stored in the storage unit elapses. The update unit updates the predetermined number of register values stored in the storage unit every time the generation unit generates the predetermined number of micro step clock signals. The rotation control unit supplies a phase current based on the micro step clock signal generated by the generation unit to the stepper motor to rotate a rotor of the stepper motor by a micro step angle found by equally dividing a step angle of the stepper motor into the predetermined number.

Control circuit

A signal processing unit and a wireless communication device are provided for making it possible to detect a frequency by means of a small scale operation circuit in a short time. The signal processing unit and the wireless communication device are comprised of a carrier data generating unit; a carrier demodulation unit; a matched filter unit that divides carrier demodulated data into a plurality of portions, carries out despread processing and accumulating operation processing as partial correlation processing, further carries out full addition processing for the partial correlation processing result, and outputs correlation detected data; a correlation peak detecting unit that detects a correlation peak from the correlation detected data and outputs correlation peak position information; a coarse frequency deviation detecting unit that outputs a frequency deviation amount with respect to the carrier demodulated data to the carrier data generating unit; and a fine frequency deviation detecting unit that outputs a fine frequency deviation amount from the correlation detected data and the correlation peak position information to the carrier data generating unit.

Signal processing unit and wireless communication device

There is provided a signal processing device and a wireless apparatus capable of not erroneously determining polarity, appropriately performing a spread modulation process, a carrier modulation process, and reception data demodulation process, improving reception accuracy, and miniaturizing a circuit, even when IF carrier frequency shift occurs. The signal processing device and the wireless apparatus includes a spread modulation unit which includes a first differential encoding process section for performing a differential encoding process on a reception data, a differential encoding process section for performing a second differential encoding process on the output, and a spread modulation process section for performing a spread modulation process on the output using a spread code; a carrier modulation unit which quadrature-modulates a transmission data spread modulation signal and a continuous wave; and a reception data decoding unit which performs a correlation process twice and a delay detection process twice.

Signal processing device and wireless apparatus

A signal processing unit and a wireless communication device are comprised of a carrier data generating unit; a carrier demodulation unit; a matched filter unit that outputs correlation peak detected data; a correlation peak detecting unit that detects a correlation peak from the correlation detected data and outputs correlation peak position information; a coarse frequency deviation detecting unit that detects a frequency component in accordance with a carrier frequency deviation amount with respect to carrier demodulated data and outputs a frequency deviation amount to the carrier data generating unit; a fine frequency deviation detecting unit that outputs a fine frequency deviation amount to reduce the frequency deviation amount from the correlation detected data and the correlation peak position information to the carrier data generating unit; and a control unit that inputs the correlation peak position information and adjusts a processing clock signal.

Provided is a matched filter whose circuit scale can be made significantly smaller by reducing the number of multipliers for a despreading process and the number of adders for an accumulating process. For each in-phase/orthogonal component, the matched filter includes a dual-port RAM that separates written samples into 128 groups each of 32 samples which are collectively read out group by group in order at a speed faster than a write speed in write mode, a bit separating section that separates data read group by group into 32 samples and simultaneously outputs the 32 samples, and 32 despreading/accumulating circuits that, with 16 samples sequentially input from 16 groups being taken as one block, sequentially despread individual samples, accumulate despreading results, and output accumulated values for each block. The matched filter further includes an accumulating section that accumulates absolute values for each block from in-phase/orthogonal outputs of the despreading/accumulating circuits, and outputs correlation value data.

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Chitose, Japan

Shigeru Takegishi