Yamaha Corporation

Shigeru Suga

Toshiyuki Takahashi

Toshio Fujioka

Katsuyuki Yokoi

Touhachi Makino

Resistor material such as polysilicon is deposited on the insulating surface of a substrate and patterned to form resistor layers disposed generally parallel. Another resistor material such as polysilicon is deposited filling each space between adjacent resistor layers, with an insulating film being interposed between the upper and lower resistor materials, and etched back to form other resistor layers at respective spaces. After an insulating film is formed covering the resistor layers, contact holes are formed in the insulating film. A conductive layer is deposited and patterned to serially connect the resistor layers.

Formation of resistor with small occupied area

On the principal surface of an Si semiconductor substrate, a field oxide film is formed defining an active region. On the active region, an insulated gate structure is formed including a gate oxide film and a polycrystalline Si layer. At the same time, a lower capacitor electrode of the polycrystalline Si layer is formed on the field oxide film. The surface of the polycrystalline layer is oxidized to form an insulating film. Another polycrystalline Si layer is deposited covering the insulating film. A mask is formed over the lower capacitor electrode. By using this mask as an etching mask, anisotropic etching is performed to leave an upper capacitor electrode and side wall spacers on the side walls of the gate electrode and lower capacitor electrode.

Semiconductor IC with FET and capacitor having side wall spacers

Semiconductor IC with FET and capacitor having side wall spacers and

A semiconductor integrated circuit including a MOSFET having a polycide gate structure, a resistor and a capacitor is monolithically manufactured. Polycrystalline silicon film, a dielectric film, and another polycrystalline silicon film are consecutively deposited. After processes of patterning and etching the dielectric film, the remaining dielectric films are used as an etching protection mask for the resistor and a capacitor. A refractory metal silicide for a polycide gate is uniformly deposited over the remaining another polycrystalline silicon films and dielectric films. The refractory metal silicide and polycrystalline silicon are consecutively etched through a patterned resist mask and the remaining dielectric films to simultaneously form the polycide gate, resistor and capacitor. Thus, a capacitor having small change in capacitance versus applied voltage is manufactured in a MOS IC device having a polycide gate.

Method of forming a semiconductor device having a capacitor and a

For enhancement of device stability, there is disclosed a semiconductor device fabricated on a semiconductor substrate comprising (a) source and drain regions formed in a surface portion of the semiconductor substrate and spaced from each other by a channel region, (b) a gate insulating film formed on the channel region, (c) a gate electrode structure formed on the gate insulating film, and (d) a passivation film of an insulating material covering the gate electrode structure and containing hydrogen-bonded-silicons equal in number to or less than 5.times.10.sup.21 per cm.sup.3, and the unstable hydrogen-bonded-silicons are decreased in number so that the semiconductor device only have a decreased trap density which results in stable operation.

Growing community of inventors

Hamamatsu, Japan

Shigeru Suga