Tokyo Shibaura Denki Kabushiki Kaisha

Hitachi, Ltd.

Kabushiki Kaisha Toshiba

Other

Hitachi Ulsi Systems Co., Ltd.

Tokyo Shibaura Electric Co., Ltd.

Hitachi Video Engineering, Incorporated

Shigeru Komatsu

Tsuguji Tachiuchi

Kenji Katsumata

Keisuke Inata

Masuo Oku

Takaaki Matono

Shigeru Hirahata

Hironori Komi

Shinobu Torikoshi

Ryosuke Toya

Fumihito Tanaka

Masaaki Hisanaga

Michio Nakamura

Hiroshi Inoue

Kunihiko Nagai

Takuo Koyama

Masahiro Abe

Satoshi Takahashi

Tatsuo Akiyama

Tetsuya Ikeda

Teruhiro Takezawa

Masao Wakatsuki

Yukihiro Ushiku

Toshiyuki Kurita

Yoshimichi Kudo

Kouji Suzuki

Akira Ogawa

Kenji Hirakawa

Katsuji Fujita

Hidenori Kakinuma

Shunji Shuto

Kazushi Mizukami

Mikiaki Kobayashi

Keiji Kawata

Kouichi Mishio

Shinobu Takahashi

Nobuo Onuki

The present invention provides a solution for interleaving data frames, in a semiconductor device manufacturing system in which the processing apparatus for conducting a process on any one of a semiconductor substrate and a thin film on a surface thereof; a self-diagnostic system for diagnosing a state of the processing apparatus; and a parameter fitting apparatus for maintaining a parameter of the self-diagnostic system when an inspection result of the semiconductor substrate having undergone the process has been determined to be correct, and for changing the parameter of the self-diagnostic system when the inspection result has been determined to be incorrect.

Semiconductor device manufacturing system and method for manufacturing semiconductor devices including calculating oxide film thickness using real time simulator

A decoder apparatus which includes a de-multiplexer, which is configured to divide motion picture data from a transport stream, a video decoder, which is configured to decode the divided motion picture data, and a first re-formatter on-screen unit, which is configured to display motion picture data and at least one of first and second graphic data on a screen. The first re-formatter on-screen unit converts motion picture data of a first aspect ratio, which is decoded by the video decoder, and first graphics data, which is produced by applying information relating to a caption corresponding to the motion picture data, into a second aspect ratio, when outputting the motion picture data of the first aspect ratio after conversion into the second aspect ratio, without converting the aspect ratio of second graphic data, which is produced by applying information relating to a program guide.

Decoder device and receiver using the same

A receiver includes a motion picture data decoder which decodes motion picture data to obtain decoded motion picture data, a memory which stores the decoded motion picture data, a video processing unit which mixes the decoded motion picture data with first graphics data and converts the motion picture data to obtain first on-screen data mixed and first format-converted motion picture data, and a second on-screen data multiplexer which mixes the decoded motion picture data with second graphics data to obtain second on-screen data-mixed motion picture data. A first output device outputs the first on-screen data mixed and first format-converted motion picture data, a second output device outputs the second on-screen data mixed motion picture data.

Receiver having motion picture data decoder

A method for designing a manufacturing process of an electronic device includes calibrating a technology computer-aided design system by fitting simulation parameters of manufacturing process and electrical characteristic simulations, using first feature of commercial manufacturing process of first electronic device manufactured by first manufacturing facilities, and first electrical characteristic of the first electronic device; acquiring second feature of trial manufacturing process of second electronic device manufactured by second manufacturing facilities, and second electrical characteristic of the second electronic device; calculating simulation electrical characteristic of the second electronic device by substituting the second feature to the manufacturing process simulation corresponding to the trial manufacturing process; comparing the second electrical characteristic with the simulation electrical characteristic; and creating design specification of commercial manufacturing process of the second manufacturing facilities based on difference between the second electrical characteristic and the simulation electrical characteristic.

Method for designing a manufacturing process, method for providing manufacturing process design and technology computer-aided design system

An object of the present application is to provide the display of motion picture data used in both of analog and digital broadcasts with high picture quality and a common user interface. The above object can be achieved by providing a plurality of picture format converters, a plurality of OSD circuits, and means for storing motion picture data used in an analog broadcast in a common memory.

An object of the present application is to provide the display of motion picture data used in both of analog and digital broadcasts with high picture quality and a common user interface. The above object can be achieved by providing a plurality of picture format converting means, a plurality of OSD means and means for taking motion picture data used in an analog broadcast in a common memory.

A base region is formed at a shallow junction and an impurity region of higher impurity concentration is formed, by a separate step, as a buried layer at a predetermined distance from the surface of a semiconductor substrate. By so doing, a bipolar diode is implemented which does not involve an increase in a base resistance even if conduction is effected over a longer period of time.

Bipolar type diode

An image synthesizing apparatus for synthesizing first and second images with each other which includes a first display memory for storing a first image data constituting a first image, and a display memory control device for comparing a second image data for constituting a second image with a predetermined image data to thereby judge whether the second image data is to be written into the first display memory or not.

Image synthesizing apparatus for superposing a second image on a first

A dental implant comprises a Y-shaped body including three planar legs which have respective openings defined centrally in sides thereof and extend radially as viewed from above, and a head supported on the body and adapted to be capped by an artificial tooth. The three legs which extend radially outwardly allow the body to be firmly anchored in an alveolar bone of the patient. After the body has been embedded in a groove defined in the alveolar bone, the alveolar bone grows and is joined together through the openings in the legs. As a result, the embedded body becomes more and more secure with time.

Dental implant with y-shaped body

A frame buffer memory capable of storing video data for plural frames of pictures with memory areas irrelevant to the display being reduced to a minimum, which video data consist of a number of pixels unequal to a power of '2' in the vertical and horizontal directions, respectively. The frame buffer memory is realized by using multi-port video RAMs and includes a plurality of regions for display and auxiliary regions. The regions for display includes at least first and second display regions which partially overlap each other. The auxiliary regions store the video data contained in the overlapping portion (overlapping region) of the first and second display regions, the video data stored in the auxiliary region being transferred to the overlapping region as occasion requires.

Frame buffer memory for display

A semiconductor device comprising a semiconductor substrate with at least one semiconductor region formed in it, a polycrystalline silicon layer formed in contact with the semiconductor region and a metal layer formed on the polycrystalline silicon layer. The peripheral portion and outer edges of the polycrystalline silicon layer are covered with an insulation layer.

Method of manufacturing a bipolar transistor

In an NPN transistor, a contact base region, an active base region, and a further base region are formed in the silicon substrate. The further base region is between the contact base region and the active base region, and is adjacent to the contact base region and the active base region. The further base region has a depth shallower than that of the contact base region and deeper than that of the active base region. In the method of forming the bipolar transistor, a polysilicon semiconductor layer is formed on a semiconductor substrate. The polysilicon semiconductor layer is partially etched to form a base leading electrode and an emitter leading electrode. A semiconductor impurity is implanted into a base forming region of the silicon substrate via that portion where the polysilicon semiconductor layer is removed.

Semiconductor device and a method of manufacturing the same

The method of manufacturing a semiconductor device according to the present invention comprises the step of forming an opening in use for forming an emitter region. This step uses the independent etching characteristics of N and P type polysilicons to simplify the opening forming process, which is very complicated in the conventional method. To be more specific, the impurity doped in the first polysilicon layer at a high concentration is diffused into the second polysilicon layer adjacent to the first polysilicon layer. When the impurity doped in the first polysilicon layer is diffused into the second polysilicon layer, the diffused impurity dominantly determines the conductivity type of that portion of the second polysilicon layer, into which the impurity is diffused. Therefore, one of the first polysilicon layer and the second polysilicon layer portion is etched by a solution, independently of the other. Since they are etched independently, a desired gap can be formed between the end portion of the first plysilicon layer and the emitter electrode.

An n.sup.+ -type buried layer is formed in the surface region of a p-type semiconductor substrate. Isulating films are formed on the semiconductor substrate. The insulating films have openings located above the buried layer. An n-type monocrystalline silicon layer is formed in one opening located above the buried layer. A base region is formed in the monocrystalline silicon layer. The base region defines a remaining portion of the monocrystalline silicon layer as a collector region. An emitter region is formed in the base region. A polycrystalline silicon layer is buried in the insulating films to have ohmic contact with the base region and serve as a portion of a base connection region. The polycrystalline silicon layer contains a p-type impurity and serves as an impurity diffusion source for the formation of an external base of the base region. An MoSi.sub.2 layer is buried in the insulating films to have ohmic contact with the polycrystalline silicon layer and to serve as a portion of the base connection region, thereby reducing the base resistance. A conductive layer for connection with a collector is formed in another opening.

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Yokohama, Japan

Shigeru Komatsu