Fujitsu Corporation

Shigeo Tani

Mitsuhiro Kawaguchi

Takashi Umegaki

Hideki Matsui

Shosaku Yamasaki

Ryoji Azumi

Toshinori Koyanagi

Katsuaki Yamanaka

Toshiaki Kinoshita

Hironori Aono

A line switching device includes multiple input ports to which signals are input and that include first input ports and second input ports different from the first input ports; multiple output ports that include given output ports; a branch unit that branches first signals input from the first input ports; and a switch that selectively outputs, among second signals input from the second input ports and branched signals branched from the first signals by the branch unit, signals that are to be switched to an output port among the given ports.

Line switching device

A transmission apparatus includes: an assigning unit to assign a number to a group of concatenation information of leading and dependent data which are multicast or broadcast; a retrieval unit to retrieve the concatenation information of the leading data corresponding to the dependent data, the leading and dependent data having the same number; a regeneration unit to regenerate concatenation information of the dependent data in accordance with the concatenation information of the leading data; a storage unit to store switch information of the leading data, the switch information representing a switch which switches output destinations of the leading and dependent data; an information retrieval unit to refer to the storage unit in accordance with leading data information included in the concatenation information of the dependent data so as to retrieve switch information of the dependent data; and a switching unit to switch the output destination of the dependent data.

Transmission apparatus and switching method

There is provided a time slot interchanger for processing channel setting data functioning as control data for interchanging time slots of multiplexed transmission data. In the time slot interchanger, processing of the channel setting data based on alarm data is performed in accordance with a preset first transmission capacity, and with respect to the channel setting data in accordance with a preset second transmission capacity, processing of the channel setting data in accordance with the first transmission capacity is dispersedly performed in a time series manner.

Time slot interchanger

There is provided a clock device including: a clock circuit to generate a plurality of clock signals, the clock circuit including a reset part for resetting generation of the clock signals; and a peripheral circuit operating based on the clock signals generated from the clock circuit, the peripheral circuit including: an error detection part for detecting an error in a process performed in the peripheral circuit by using the clock signals, and a determination part for determining whether to reset the clock circuit, based on information of the error detected by the error detection part.

Clock device

There is provided a node apparatus having a plurality of interface units for interfacing to a transmission line, switch units of a work system and a protection system for switching signals of the transmission line, and a service selector used to relieve a network failure over ring networks interconnected by node apparatuses, the node apparatus including a first controller for controlling the service selector in the switch units, and a second controller for controlling setting information of alarm detection in case of using the service selector in the interface units.

Node apparatus interconnecting ring network

In a transmission apparatus, unlike in the conventional transmission apparatus, a protection switch is not arranged on the signal path, but a TSI having only the basic function performs the function of the protection switch as a substitute, a processing unit to perform the switching function at a low rate is artificially constructed on a TSI, the switch process of SONET protection type is artificially executed by the TSI, and a signal for controlling the TSI function is further controlled thereby to realize the protection switch function. The logic of switching at the main signal rate in addition to the conventional TSI function is deleted.

Transmission apparatus

A network apparatus includes: an input interface unit; a first and second line switching units cross-connecting output signals from the input interface unit; an output interface unit including a selection unit selecting outputs from the first or second line switching units; and a CPU. The line switching units each include: a control signal generation unit storing setting data in a memory and generating a line switching control signal based on the setting data; a memory error detection processing unit detecting a memory error and outputting error information; and a main signal processing unit writing setting data into a buffer when an error is not detected, and holding setting data stored in the buffer when the error is detected, and which performs cross-connection processing according to the setting data stored in the buffer. The CPU controls the selection unit according to the error information.

Network apparatus that determines whether data is written into buffer based on detection of a memory error

There is described a cross-connect apparatus which can apply a cross-connect operation in place of a function of a hard switch that has conventionally been used for a purpose other than a cross-connect operation, by selection of line setting information used for path switching and service selection operations, and by performing a cross-connect operation based on the information, thereby preventing redundant configuration of the cross-connect apparatus and diminishing power consumption.

Cross-connect method and cross-connect apparatus

A frame synchronism processing apparatus including a first detecting unit for detecting the synchronism of a subframe, a second detecting unit for detecting the synchronism of a multiframe, and a synchronism detection retrying control unit for forcibly bringing the first detecting unit and the second detecting unit into a synchronism detection retrying mode if the second detecting unit has failed to detect the synchronism of the multiframe. Assuring that a false synchronous state is brought about on the subframe synchronism with the result that the detection of the synchronism of the multiframe has been failed, the detection of synchronism of the subframes and the detection of synchronism of the multiframe are retried, thus avoiding a deadlock of frame synchronism process due to the possible false synchronous state and hence improving the reliability in synchronism process.

Frame synchronism processing apparatus and frame synchronism processing method

A digital communication system includes a first station, a second station and a network therebetween. The first station includes a clock selecting device for selecting one clock from a plurality of different clocks; and a transmitting device for transmitting frames to the second station based on the selected clock. The second station includes an evaluating device for evaluating transmission quality of data in each of the frames received from the first station; and a quality message inserting device for inserting the evaluated transmission quality as a quality message into a part of the corresponding frame to be transmitted to the first station. The first station further includes a message processing device for extracting the quality message from each received frame to convert the extracted quality message into a corresponding message signal to output the message signal; and a control device for causing the clock selecting device to select a clock corresponding to the message signal output from the message processing device.

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Kashihara, Japan

Shigeo Tani