Sharp Kabushiki Kaisha Corporation

National Institute of Advanced Industrial Science and Technology

National Science and Technology

Shigeo Ohnishi

Yasunari Hosoi

Nobuyoshi Awaya

Naoyuki Shinmura

Takashi Nakano

Katsuji Iguchi

Kazuya Ishihara

Yukio Tamai

Shinobu Yamazaki

Hiroyuki Akinaga

Masayuki Tajiri

Tetsuya Ohnishi

Takahiro Shibuya

Hisashi Shima

Fumiyoshi Takano

Yoshimitsu Yamauchi

Kenichi Tanaka

Yasushi Ogimoto

Keizo Sakiyama

Tsukasa Doi

Makoto Tanigawa

Kohji Inoue

Shun Mitarai

Nobuyuki Takenaka

Hidehisa Tateoka

Takashi Oka

Naoto Nagaosa

Yoshinori Tokura

Tohru Hara

Provided is a variable resistive element which performs high speed and low power consumption operation. The variable resistive element comprises a metal oxide layer between first and second electrodes wherein electrical resistance between the first and second electrodes reversibly changes in accordance with application of electrical stress across the first and second electrodes. The metal oxide layer has a filament, which is a current path where the density of a current flowing between the first and second electrodes locally increases. A portion including at least the vicinity of an interface between the certain electrode, which is one or both of the first and second electrodes, and the filament, on an interface between the certain electrode and the metal oxide layer is provided with an interface oxide which is an oxide of at least one element included in the certain electrode and different from the oxide of the metal oxide layer.

Variable resistive element, manufacturing method for same, and non-volatile semiconductor memory device

A semiconductor memory device having a cross point structure includes a plurality of upper electrodes arranged to extend in one direction, and a plurality of lower electrodes arranged to extend in another direction at a right angle to the one direction of the upper electrodes. Memory materials are provided between the upper electrodes and the lower electrodes for storage of data. The memory materials are made of a perovskite material and arranged at the lower electrodes side of the corresponding upper electrode extending along the corresponding upper electrode.

Structure and manufacturing method of semiconductor memory device

A variable resistance element comprises a variable resistor of strongly-correlated material sandwiched between two metal electrodes, and the electric resistance between the metal electrodes varies when a voltage pulse is applied between the metal electrodes. Such a switching operation as the ratio of electric resistance between low and high resistance states is high can be attained by designing the metal electrodes and variable resistor appropriately based on a definite switching operation principle. Material and composition of the first electrode and variable resistor are set such that metal insulator transition takes place on the interface of the first electrode in any one of two metal electrodes and the variable resistor by applying a voltage pulse. Two-phase coexisting phase of metal and insulator phases can be formed in the vicinity of the interface between the variable resistor and first electrode by the work function difference between the first electrode and variable resistor.

Variable resistor element and its manufacturing method

Provided is a nonvolatile semiconductor device capable of performing writing operations of different resistance changes for memory cells having variable resistive elements whose resistive characteristics are changed by voltage applications, individually and simultaneously. The device includes: a load resistive characteristic variable circuit for each bit line connected commonly with the memory cells on the same column for selecting one of two load resistive characteristics according to a first writing operation where the resistive characteristics of the variable resistive element to be written transit from a low resistance state to a high resistance state or a second writing operation where they transit reversely; and a writing voltage pulse application circuit for applying a first voltage pulse in a first writing operation and a second voltage pulse in a second writing operation to the memory cells to be written through the load resistive characteristic variable circuits and the bit limes.

Nonvolatile semiconductor memory device

The variable resistance element of the present invention is a variable resistance element having an electrode, the other electrode, and a metal oxide material sandwiched between the electrodes and having an electrical resistance, between the electrodes, changing reversibly in response to a voltage applied between the electrodes. The variable resistance element further includes, inside the metal oxide material, a low resistance material having a lower electrical resistance than the metal oxide material and being out of contact with at least either one of the electrodes. This makes it possible to reduce a forming voltage for providing a conductive section inside the metal oxide material, without causing a leakage current to increase.

Variable resistance element, method for producing the same, and nonvolatile semiconductor storage device

There is provided a semiconductor memory device with extremely less deterioration of characteristics of dielectric thin film and with high stability. A TaSiN barrier metal layer,is formed on a Pt upper electrode,This TaSiN barrier metal layer,has electrical conductivity and hydrogen-gas blocking property and besides has an amorphous structure stable in high temperature region without crystallizing even during firing for crystallization of an oxide ferroelectric thin film (SBT thin film),Then, hydrogen gas generated during later formation of a second interlayer insulating film,is reliably blocked from invading into the oxide ferroelectric thin film,by which characteristic deterioration of the oxide ferroelectric thin film,due to hydrogen gas is prevented.

Semiconductor memory device with less characteristic deterioration of dielectric thin film

A method of forming a device isolation region includes the steps of: forming a first dielectric film and an oxidation-resistant deposition film successively on a semiconductor substrate; forming a trench groove in the semiconductor substrate by successively processing the oxidation-resistant deposition film, the first dielectric film and the semiconductor substrate by anisotropic etching; forming a second dielectric film to cover at least an inner surface of the trench groove; depositing a third dielectric film in the trench groove so that the thickness of the third dielectric film buried in the trench groove is larger than a depth of the trench groove; planarizing a surface of the third dielectric film and an upper surface of the trench groove; and removing the oxidation-resistant deposition film and the first dielectric film to form the device isolation region, wherein a thermal treatment of the entire substrate is carried out to densify the third dielectric film and to oxidize an interface between the second dielectric film and the semiconductor substrate.

Method of forming a device isolation region

A method of fabricating a semiconductor memory device comprises the steps of: (a) forming an interlayer insulating film on a semiconductor substrate, opening a contact hole in said interlayer insulating film, and burying a plug in said contact hole; (b) forming a first insulating film on said interlayer insulating film inclusive of said plug, and forming a trench in said first insulating film above said plug; (c) forming a first conductive film on said first insulating film inclusive of said trench, and etching back said first conductive film by a chemical mechanical polishing method to form a bottom electrode inside said trench; (d) forming a high dielectric film or a ferroelectric film and a second conductive film in this order on said first insulating film inclusive of said bottom electrode; and (e) patterning simultaneously said high dielectric film or ferroelectric film and said second conductive film to form a capacitor insulating film and a top electrode.

Method of fabricating semiconductor memory device

A process for producing a semiconductor device including the steps of:

Process for producing semiconductor devices

Growing community of inventors

Fukuyama, Japan

Shigeo Ohnishi