Nec Electronics Corporation

Shigeo Noda

Masaharu Mizuno

A semiconductor device includes a plurality of logic cells formed on a semiconductor substrate, wherein each of the plurality of logic cells has a circuit for a function block of a logic circuit; and a wiring layer which connects the plurality of logic cells to form the logic circuit function blocks and thereby the logic circuit. The wiring layer includes a power supply wiring line pattern formed in a region corresponding to each of the plurality of logic cells; a ground wiring line pattern formed in the region; and a plurality of terminal patterns formed in the region. Each of the plurality of terminal patterns is connected with the circuit of the logic cell, and the plurality of terminal patterns are arranged adjacent to at least one of the power supply wiring line pattern and the ground wiring line pattern.

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Kanagawa, Japan

Shigeo Noda