Hitachi, Ltd.

Hitachi Koki Co., Ltd.

Renesas Technology Corp.

Shigeo Moriyama

Yoshio Kawamura

Kan Yasui

Yoshio Homma

Soichi Katagiri

Masaaki Itou

Tsuneo Terasawa

Tatsuo Harada

Sadayuki Nishimura

Katsuhiko Yamaguchi

Kikuo Kusukawa

Fumihiko Uchida

Yoshihiro Ishida

Akira Arimoto

Mutsumi Kikuchi

Masahiko Sato

Kotaro Shimamura

Souichi Katagiri

Hidemitsu Naya

Rikio Tomiyoshi

Masayuki Nagasawa

Ryousei Kawai

Takashi Kugaya

Shigeo Ootsuki

Hideo Kashima

Shinji Okazaki

Toshiei Kurosaki

Toshiaki Kita

Hiroaki Oizumi

Sunao Matsubara

Masaaki Ito

Tatuharu Yamamoto

Yoshimasa Kondo

Ryosei Kawai

Ryousei Kawa-ai

Susumu Saito

Hiroyuki Sakai

Hiroshi Fukuda

Takashi Yamazaki

Natsuki Yokoyama

Yumiko Anzai

Yoshito Tsunoda

Sumio Hosaka

Yukio Suzuki

Yoshifumi Kawamoto

Takeshi Mochizuki

Shinji Kuniyoshi

Yoshinori Miyamura

Koji Takahashi

Takeshi Furusawa

Kozo Mochiji

Kenichi Kugai

Takashi Nishimura

Masakazu Ichikawa

Akihiro Takanashi

Minoru Hidaka

Miyako Matsui

Hitoshi Nakahara

Hidenori Yamaguchi

Seiya Hashimoto

Shyuichi Oowada

Makoto Kajiwara

Kenichi Togawa

Yoko Sugawa

Sakae Saitou

Yuishin Tanaka

Hiroshi Sugano

A semiconductor production system has a semiconductor manufacturing apparatus having an exposure unit, a control unit for controlling the exposure unit and a storage device; a semiconductor inspection apparatus having an observation unit, a control unit for controlling the observation unit and a storage device; and a storage device commonly used by the semiconductor manufacturing apparatus and the semiconductor inspection apparatus. The manufacturing apparatus, the inspection apparatus and the commonly used storage device are interconnected via a storage area network. With the semiconductor manufacturing apparatus and the storage device linked together via the storage area network, a large volume of image data or design data can be communicated at high speed, thus improving the system throughput.

Semiconductor production system

The present invention relates to a polishing apparatus, and a semiconductor manufacturing method using the apparatus. Dressing of a grindstone surface is ground by sizing processing whereby dressing of a tool surface can be done while preventing occurrence of cracks on the grindstone surface which is the cause for occurrence of scratches. Further, flatness of the surface of a dressing tool can be guaranteed because of sizing cutting-in; even if a thick grindstone of a few centimeters is used, the flatness can be maintained to the end; and processing with less in-face unevenness can be always carried out. Therefore, the life of the dressing tool can be greatly extended. Further, the present sizing-dressing is carried out jointly with processing of a wafer to thereby enable improvement of throughput of the apparatus as well as maintenance of a processing rate. The present apparatus and method are effective for planarization of various substrate surfaces having irregularities.

Polishing apparatus and method for producing semiconductors using the apparatus

In order to polish an insulating film, a cerium oxide polishing agent (ceria slurry) is used. The ceria slurry is composed of cerium oxide powder containing Na, Ca, Fe, and Cr concentration of which is less than 10 ppm. Fragile inorganic and organic insulating films formed at relatively low temperatures can be polished without degrading the characteristics of the semiconductor element due to Na diffusion.

Polishing agent and polishing method

A film formed on a surface of a wafer on which an integrated circuit is to be constructed can be planarized by using a fixed abrasive tool regardless of the width of elements of a pattern underlying the film. The fixed abrasive tool is liable to form scratches in the surface of the film. A planarizing process of the present invention employs a fixed abrasive tool containing substances harder than the film to be planarized in a content of 10 ppm or below and having a mean pore diameter of 0.2 &mgr;m or below.

Semiconductor device fabricating method

A method for processing semiconductor wafers, which provides planarized surface in a well controllable manner and with high accuracy by processing a film with uneven surface, formed over a semiconductor wafer, within the area of a working surface with a diameter larger than that of said semiconductor wafer by not more than two times, and by processing the film with a polishing liquid supplied from a supply unit disposed on a vertically arranged working surface is disclosed. Additionally, high quality dressing of the working surface can be easily performed by virtue of the smaller diameter of the working surface. Furthermore, the vertical arrangement of the working surface makes possible ready compatibility with semiconductor wafers of enlarged diameters.

Apparatus for processing semiconductor wafers

A method for fabricating a semiconductor device includes grindstone surface activation treatment by means of a brush or ultrasonic wave carried out when a concave/convex pattern of a semiconductor wafer is planarized by polishing a semiconductor wafer held by a wafer holder by using a grindstone constituted of abrasive grains and material for holding the abrasive grains onto which the semiconductor wafer is pressed with relative motion. The semiconductor wafer is processed with high removal rate and the polishing thickness is controlled accurately.

Method for fabricating semiconductor device and processing apparatus for processing semiconductor device

The present invention relates to a polishing method using a grindstone comprising abrasive grains and a bonding resin for bonding the abrasive grains, as well as to a polishing apparatus to be used for the polishing method. By using a resin for bonding abrasive grains, it is possible to obtain a grindstone having a desired modulus of elasticity. With such a grindstone, the surface of a substrate having concave and convex portions can be rendered uniformly flat, irrespective of the size of the concave and convex portions. Further, by first polishing the substrate surface with a polishing tool of a small elastic modulus and thereafter polishing it with a polishing tool of a large elastic modulus, it is possible to obtain a polished surface of reduced damage. The method of the invention is effective in planarizing various substrate surfaces having concave and convex portions.

Polishing method and apparatus

Rotary machining apparatus

Method for working semiconductor wafer

In the polishing machine 10 for pressing the polished surface 7 of the workpiece 1 against the face where there are abrasives 15 of the rotating polishing tool 11 and executing chemical mechanical polishing, the brushing device 30, the cleaner 40, the abrasive supplier 52, and the pure water supplier 60 are sequentially arranged behind the location of the head 20 for pressing the workpiece 1 against the polishing tool 11 in the rotational direction. The cleaner 40 sprays the cleaning water 47 to the face where there are abrasives 15 of the rotating polishing tool 11 and sucks and collects it by the vacuum hole 45. Fresh slurry 62 is always supplied by the slurry supplier 63 comprising the abrasive supplier 52 and the pure water supplier 60.

Polishing method for semiconductors and apparatus therefor

Growing community of inventors

Tama, Japan

Shigeo Moriyama