Hitachi, Ltd.

Shigeo Goto

Susumu Takahashi

Yoshinori Imamura

Toshiyuki Usagawa

Kenji Hiruma

Masahiko Kawata

Shinichiro Takatani

Masao Yamane

Katsuhiko Mitani

Tomonori Tanoue

Masayoshi Kobayashi

Takeshi Kikawa

Hidekazu Okuhira

Yasunari Umemoto

Hidetoshi Matsumoto

Hiroshi Masuda

Kazuhiro Mochizuki

Tomoyoshi Mishima

Makoto Morioka

Chushirou Kusano

Yoko Uchida

Masamitsu Yazawa

A laser diode having an optical cavity which is formed on top of a semiconductor substrate and has semiconductor crystals and an oxide layer that is substantially free from arsenic oxide. The oxide layer may be formed by using the matrix of the optical cavity as a matrix or a layer formed by the hydrogenation or oxygenation of the matrix of the cavity on at least one side of the optical cavity. The laser diode has a long operational life and high reliability without facet degradation.

Laser diodes and manufacturing methods

A semiconductor radiative device comprises a layered film comprised of a low-refraction first dielectric film and a high-refraction second dielectric film having a refraction index greater than that of the first dielectric film, and formed on at least one of facets of an optical cavity. The high-refraction second dielectric film is an amorphous dielectric film of nitrogen-doped hydrogenated silicon. The semiconductor radiative device is capable of stably operating in a high-output mode for a long period of time.

Semiconductor radiative device

A semiconductor device comprises a semiconductor substrate formed by a first single crystalline semiconductor material and semiconductor layers formed on the semiconductor substrate by a second single crystalline semiconductor material doped with an element which can easily surface segregate. The surface of the semiconductor substrate is formed of a crystalline plane substantially equivalent to a facet plane which is formed on the surface of the second single crystalline semiconductor material if the second single crystalline semiconductor material is epitaxially grown with being doped with the element on a (100) plane of the first single crystalline semiconductor material.

Semiconductor device

This invention discloses a heterojunction type field effect transistor such as 2DEG-FET and a heterojunction type bipolar transistor such as 2DEG-HBT. The former is fabricated by applying to the formation of its source and drain regions a technique which causes the disorder of the heterojunction by intoduction of an impurity such as by ion implantation or a technique which causes the disorder of the heterojunction by forming a film made of at least one kind of material selected from insulators, metals and semiconductors which have a different linear coefficient of thermal expansion from that of the material of a semiconductor substrate on the heterojunction semiconductor region which is to be disordered. The latter is fabricated by applying either of the techniques described above to a base ohmic contact region. These semiconductor devices can reduce the source-gate resistance and the parasitic base resistance. The invention discloses also the structure of the ohmic contact layer which has a trench on the surface thereof and is particularly effective for reducing the source-gate parasitic resistance.

Semiconductor device having a heterojunction and a two dimensional gas

Source and drain electrode metals of a field effect transistor having a recessed gate electrode metal are directly connected to a high impurity concentration semiconductor layer which faces the gate electrode metal through an insulator film which defines the side wall of the recess. The source and drain electrode metals may be disposed so as to face the gate electrode metal through the side insulator film. With this arrangement, it is possible to lower the parasitic resistance between the gate electrode and another electrode of the field effect transistor, to lower the contact resistance between a semiconductor layer and the source and drain electrodes, to reduce the capacitance of the recess gate electrode and to increase the source-gate breakdown voltage, advantageously. The above-described arrangement is particularly suitable for a transistor employing a compound semiconductor, and can also be applied to semiconductor devices other than field effect transistors. Such semiconductor devices can readily be produced by forming a gate electrode metal with a self-alignment process using the lift-off method.

Semiconductor device and method of producing the same

A field-effect transistor or a bipolar transistor may be provided in which the contact resistance between a channel layer or base layer and a contact layer are reduced. For example, an InGaAs buffer layer may be formed on the substrate side of an InGaAs channel layer of a field-effect transistor and by the bypassing effect that carriers pass through this InGaAs buffer layer, the InGaAs channel layer comes in contact with the contact layer with a low resistance. The contact resistance between the InGaAs channel layer and the contact layer can be reduced to 10 ohm per a width of 10.mu.m, and as a result, the value of transconductance factor K of a field-effect transistor can be increased in 14 mA/V.sup.2 per a width of 10.mu.m.

Semiconductor device having reduced contact resistance between a channel

This invention discloses a heterojunction type field effect transistor such as 2DEG-FET and a heterojunction type bipolar transistor such as 2DEG-HBT. The former is fabricated by applying to the formation of its source and drain regions a technique which causes the disorder of the heterojunction by introduction of an impurity such as by ion implantation or a technique which causes the disorder of the heterojunction by forming a film made of at least one kind of material selected from insulators, metals and semiconductors which have a different linear coefficient of thermal expansion from that of the material of a semiconductor substrate on the heterojunction semiconductor region which is to be disordered. The latter is fabricated by applying either of the techniques described above to a base ohmic contact region. These semiconductor devices can reduce the source-gate resistance and the parasitic base resistance. The invention discloses also the structure of the ohmic contact layer which has a trench on the surface thereof and is particularly effective for reducing the source-gate parasitic resistance.

Semiconductor device having a two-dimensional electron gas as an active

A solid film forming apparatus, e.g., an MO-MBE (Metal-Organic Molecular Beam Epitaxy) apparatus, wherein evacuatable containers isolated from a growth chamber by a switching device and connected to raw material gas introduction pipings are provided between the growth chamber for a solid film, e.g., a compound semiconductor, and raw material gas introduction pipings. Growth of the solid film is controlled by opening and closing the switching device and evacuating the container at least while the switching device is closed during the growth of the solid film. An undesired influence on the growing film due to residual gas in the containers which are not used for growth can be prevented and, hence, interception and introduction of the raw material gas into the growth chamber can be performed with remarkably high controllability, and films of superior abruptness of the interface between films, e.g., the heterojunction of the compound semiconductor, can be obtained.

Solid film growth apparatus

A compound semiconductor structure in the form of a superlattice film with effectively graded average composition, comprising an alternating lamination of two kinds of layers of different composition to form pairs of layers, the ratio of the thickness of one layer to the thickness of the other in said pairs of layers being gradually varied in the direction of thickness throughout successive pairs, thereby the average composition being effectively graded throughout the pairs. In a hetero-junction field effect transistor, the layer of effectively graded composition is used between a semiconductor layer making low resistance contact with a current-supplying electrode and a semiconductor layer where a two dimensional channel is to be formed. In case of AlGaAs/GaAs system, the Al composition is varied. When the superlattice film is heat-treated, Al in the AlGaAs layer diffuses into the GaAs layer, yielding a film with actually smoothly graded Al mole fraction.

Growing community of inventors

Kokubunji, Japan

Shigeo Goto