Sony Corporation

Shigemitsu Murayama

Yasuhide Shimizu

Kohei Kudo

Hiroaki Yatsuda

Junji Toyomura

Yukitoshi Yamashita

Norifumi Kanagawa

Kouhei Kudou

Kohhei Kudoh

Disclosed herein is a differential amplifier including: an input terminal configured to receive an input signal; an output terminal configured to output an output signal obtained as a result of amplifying the input signal; an amplification part configured to amplify the input signal to generate the output signal; a load circuit which is connected between the amplification part and a power-supply terminal, and is provided with a first-conduction transistor, and a changeover switch configured to switch a connection between a gate electrode of the first-conduction transistor and a drain electrode of the first-conduction transistor to a connection between the gate electrode and the output terminal or vice versa; and a leak cancel switch configured to generate a leak cancel current for reducing an off leak current flowing through the changeover switch.

Differential amplifier and analog/digital converter

A comparator includes a sampling capacitor, a first switching unit which is connected to an input end of the sampling capacitor and which applies an input signal to the input end of the sampling capacitor, a second switching unit which is connected to the input end of the sampling capacitor and which applies a reference signal to the input end of the sampling capacitor, an output transistor connected to an output end of the sampling capacitor in a source follower connection manner or an emitter follower connection manner, and a third switching unit which is connected to an output end of the sampling capacitor and which maintains maintaining a voltage at the output end of the sampling capacitor to be constant. The input signal is compared with the reference signal.

Comparator, sample-and-hold circuit, differential amplifier, two-stage amplifier, and analog-to-digital converter

An analog to digital converter includes: a reference circuit adapted to generate reference voltages; differential amplifiers; normal phase circuits each of which samples a normal phase analog input signal and transfers a comparison voltage, obtained by comparison with a reference voltage generated by the reference circuit, to a first input terminal of one of the differential amplifiers when the input is differential and single-ended; and reversed phase circuits each of which samples a reversed phase analog input signal and transfers a comparison voltage, obtained by comparison with a reference voltage generated by the reference circuit, to a second input terminal of one of the differential amplifiers when the input is differential and which samples a ground level as a reference voltage of the reference circuit and supplies the reference voltage and comparison voltage to the second input terminal of the differential amplifier when the input is single-ended.

A/D converter

A parallel type analog-to-digital conversion circuit, including a reference signal generating portion and a comparison amplification portion, the comparison amplification portion including a plurality of amplifiers, input resetting switches, first sampling capacitors, second sampling capacitors, first sampling switches, and second sampling switches.

Parallel type analog-to-digital conversion circuit, sampling circuit and comparison amplification circuit

A serial-parallel type analog-to-digital converter includes a reference voltage generator, a higher bit comparing portion and a lower bit comparing portion, and a reference voltage selecting portion, wherein the lower bit comparing portion includes the plurality of comparison stages.

Serial-parallel type analog-to-digital converter and analog-to-digital conversion method

A subranging analog-to-digital converter is disclosed. The converter includes: a divided voltage generation circuit that equally divides a range of a predetermined voltage, and generates 2+1 divided voltages; a higher-order conversion circuit that generates a signal for higher-order m bits of the digital signal by comparing the analog signal with the 2&#x2212;1 or less of the 2+1 divided voltages; a switch circuit that selects at least two of the 2+1 divided voltages based on information provided by the higher-order conversion circuit; a lower-order conversion circuit that generates a signal for lower-order n bits (n=N&#x2212;m) of the digital signal by comparing the analog signal with the divided voltages being a selection result of the switch circuit; and an encoder that generates the digital signal based on the signal provided by the higher-order conversion circuit and the signal provided by the lower-order conversion circuit.

Subranging converter for converting an analog signal into an N-bit digital signal

A semiconductor device includes a semiconductor substrate and a ladder resistor formed on the semiconductor substrate. The ladder resistor includes a plurality of elongated resistor portions arranged in parallel with each other, a plurality of connection portions that connect the resistor portions at predetermined intervals in a longitudinal direction of the resistor portions, and a plurality of voltage extraction portions provided in order to extract voltages at the individual connection portions.

Semiconductor device

A differential amplifier device is disclosed wherein the device comprises a differential amplifier circuit, a load circuit connected to the differential amplifier circuit; and a change-over switch connected to the load circuit for changing a gain of the differential amplifier circuit by switching between a full load where a whole of the load circuit is set to be the load of the differential amplifier circuit and a partial load where a part of the load circuit is set to be the load of the differential amplifier circuit, wherein the load circuit is configured to amplify an input signal and an output signal of the differential amplifier circuit in the full load.

Growing community of inventors

Nagasaki, Japan

Shigemitsu Murayama