Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Toshiba Memory Corporation

Shigehito Saigusa

Tetsuro Itakura

Ichiro Seto

Yousuke Hagiwara

Yuki Fujimura

Osamu Watanabe

Toshiya Mitomo

Kohei Onizuka

Rui Ito

Shusuke Kawai

Mitsuyuki Ashida

Hiroyuki Kobayashi

Hitoshi Shiga

Masahiro Hosoya

Hiroshi Yoshida

Kan Shimizu

Toshiyuki Yamagishi

Ryuichi Fujimoto

Tong Wang

Makoto Morimoto

Hiroshi Masumoto

Yumi Takada

Motoki Nagata

A carrier leakage correction method for a quadrature modulator according to an embodiment includes inputting a test signal with a frequency fto a transmitter and up-converting the test signal with a frequency fand down-converting with the frequency f. A frequency 2fcomponent is detected in the down-converted test signal. One or a plurality of parameters of the transmitter is/are adjusted so as to reduce a magnitude of the detected frequency 2fcomponent in the test signal.

Carrier leakage correction method for quadrature modulator

According to one embodiment, a semiconductor memory device includes: a word line; a first memory cell; a first circuit; and a second circuit. The first memory cell is connected to the word line. The first circuit generates a first voltage having a waveform including a first time period during which a voltage value increases with time and a second time period during which the voltage value decreases with time, and applies the generated first voltage to the word line. The second circuit measures first time from a first timing when a state of the first memory cell changes according to the first voltage to a second timing when the state of the first memory cell changes according to the first voltage after the first timing. The second circuit determines first data stored in the first memory cell on the basis of the measured first time.

Read process in a semiconductor memory device including a memory cell transistor

According to an embodiment, a communication device includes a phase-shifting circuit that shifts a phase of a local signal and supplies it to an orthogonal demodulator. The phase-shifting circuit includes first and second signal input ends that are supplied with an output signal of a local oscillator between both ends thereof, a frequency divider that has first and second input ends, and a switching part that is provided between the first and second signal input ends and the first and second input ends of the frequency divider and switches connection between the first and second signal input ends and the first and second input ends of the frequency divider.

Communication device and orthogonal error measurement method for communication device

A transmission and reception circuit includes a transmission circuit, a reception circuit, and a signal feedback path. The transmission path includes an output section, a signal generating circuit generating an in-phase component signal and an orthogonal component signal, and a transmission analog baseband circuit configured to perform digital to analog conversion of the generated in-phase component signal and orthogonal component signal. The reception circuit includes an input section, a reception analog baseband circuit performing analog to digital conversion of the transmitted in-phase component signal and orthogonal component signal, and a signal detection circuit that detects the analog-to-digital converted in-phase component signal and orthogonal component signal converted by the reception analog baseband circuit. The signal feedback path has a first end which is connected to the output section of the transmission circuit, and a second end which is connected to the input section of the reception circuit.

Transmission and reception circuit, transceiver, and method of correcting time difference of signal

A bias circuit according to an embodiment is a bias circuit that supplies a bias voltage to an amplifying element. The bias circuit of the embodiment includes a first current source that has a characteristic of varying an output current with the surrounding temperature variations, and a second current source that has a different output characteristic from the first current source and that can control the output current. The bias circuit of the embodiment also includes a comparator for comparing the output current of the first current source with the output current of the second current source, and a bias supply part that controls the output current of the second current source on the basis of the comparison result of the comparator and supplies a bias voltage to the amplifying element in accordance with the comparison result.

Bias circuit and amplifier

A semiconductor device includes a silicon substrate, a shield which is disposed on the silicon substrate and includes a conductive material, a capacitor electrode disposed on the shield, and at least one pillar member which is provided between the shield and the silicon substrate and includes a conductive material. The pillar member may be disposed at a location other than a location of a through-hole.

Semiconductor device with conductive pillar unit between shield and silicon substrate

A charging control apparatus controls charging of a battery connected to a battery terminal and supplies a voltage and a current necessary for a system circuit through an output terminal. The charging control apparatus has a switching control circuit that controls a DC-DC converter, the DC-DC converter performing DC-DC conversion with respect to an input voltage input through an input terminal and outputting an obtained output voltage to the output terminal. The charging control apparatus has an output voltage detection circuit that detects the output voltage. The charging control apparatus has a battery voltage detection circuit that detects a battery voltage of the battery terminal. The charging control apparatus has a first switch MOS transistor connected between the output terminal and the battery terminal. The charging control apparatus has a voltage control circuit that controls an operation of the first switch MOS transistor according to the battery voltage.

Charging control circuit

A power amplifier includes a first amplifier unit, a second amplifier unit, a first switching element, a second switching element and a third switching element. Each of the amplifier units includes a power supply terminal, a ground terminal, an input terminal, and an output terminal, and amplifies a signal received at the input terminal according to a voltage between the power supply terminal and the ground terminal, and outputs the signal from the output terminal. The first switching element is connected between the ground terminal of the first amplifier unit and the power supply terminal of the second amplifier unit. The second switching element is connected between the ground terminal of the first amplifier unit and a first reference voltage terminal. The third switching element is connected between the power supply terminal of the second amplifier unit and a second reference voltage terminal.

Power amplifier and transmitter

According to an embodiment, a power amplifier includes a variable passive element and a comparator. The variable passive element is connected directly or indirectly to a first terminal of a switch element and serves to increase or reduce a resonant frequency of the amplifier. The comparator compares a voltage of interest with a reference voltage and outputs a control voltage for the variable passive element based on a difference between the voltage of interest and the reference voltage.

Power amplifier and power transmission apparatus

A differential amplifier unit and a feedback unit are provided. The differential amplifier unit includes first and second transistors and first to fourth loads. Each of the first and second transistors is provided with a current input end, a current output end connected to a lower potential power source and a control end. The first and second loads are cascade connected between a higher potential power source and the current input end of the first transistor. The third and fourth loads are cascade connected between the higher potential power source and the current input end of the second transistor. The feedback unit generates first and second feedback currents based on first and second output voltages. The feedback unit inputs the first and second feedback currents to a third node connecting the first and second loads and a fourth node connecting the third and fourth loads.

Differential amplifier

A time constant automatic adjusting circuit comprises: a filter circuit varying a phase of an clock signal to be input so as to output the clock signal; a phase comparison circuit comparing a phase of an output signal of the filter circuit with the phase of the clock signal, and outputting a predetermined voltage when the phase of the output signal and the phase of the clock signal are the same; at least three comparators comparing the output voltage with a plurality of different voltages; an up-down counter counting a number of output bits of either one of the at least three different voltages in accordance with an output result of the comparators; and a control circuit varying the time constant of the filter circuit in accordance with the number of output bits counted by the up-down counter.

Growing community of inventors

Yokohama, Japan

Shigehito Saigusa