Nec Corporation

Shigehisa Kawabe

Keiichi Hirayama

A television video signal processing circuit for imparting to a television picture special effects includes special function generators and picture pixel distance calculating circuits which enable pixels to be rearranged to create a special effect such as the folding of a portion of the picture unto itself or the rolling up thereof with reference to a predesignated straight line. A brightness contrast control circuit alters the brightness information in certain portions of the picture to accentuate given regions thereof so that the image appears to the viewer as if it were three dimensional.

Special effect system for video signal

A special effect system for a video signal comprises a distance calculator for calculating a distance between any given picture element data stored in a video memory, and a predetermined straight line. Certain picture elements are to be relocated in the final image, depending on their distance from the predetermined straight line, to obtain a particular special effect. A function generator including a readable function memory receives the calculated distance data as a read address to the function memory, whereby the calculated distance becomes the effective parameter for generating the special effects. A read address to the video memory is produced by utilizing the output from the function generator.

A noise eliminating apparatus, which may be used in a special effect system for a television video signal, removes noise from an input key signal by inhibiting signal transmission when the signal pulse width is below an arbitrary value. The noise eliminating apparatus includes an arbitrary value generator indicating a noise width to be eliminated. A pulse width detector produces a detection signal when the pulse width of the input key signal exceeds the noise width. A plurality of signal delay circuits are connected in series for sequentially delaying the input key signal. Associated with each delay circuit is a comparator for comparing a respective preselected constant value with the arbitary value and producing a respective coincident signal when such values coincide. A signal inhibitor, such as a logic AND gate, is associated with each delay circuit. The signal inhibitor inhibits the associated delay circuit from delaying the input key signal when the coincident signal is present but the detection signal is absent. With this arrangement, the input key signal following a removed noise signal is transmitted with unaffected width.

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Tokyo, Japan

Shigehisa Kawabe